
Technical Data
MC68HC11E Family
—
Rev. 4
66
Operating Modes and On-Chip Memory
MOTOROLA
Operating Modes and On-Chip Memory
4.2 Introduction
This section contains information about the operating modes and the
on-chip memory for M68HC11 E-series MCUs. Except for a few minor
differences, operation is identical for all devices in the E series.
Differences are noted where necessary.
4.3 Operating Modes
The values of the mode select inputs MODB and MODA during reset
determine the operating mode. Single-chip and expanded multiplexed
are the normal modes.
In single-chip mode only on-chip memory is available.
Expanded mode, however, allows access to external memory.
Each of the two normal modes is paired with a special mode:
Bootstrap, a variation of the single-chip mode, is a special mode
that executes a bootloader program in an internal bootstrap ROM.
Test is a special mode that allows privileged access to internal
resources.
4.3.1 Single-Chip Mode
In single-chip mode, ports B and C and strobe pins A (STRA) and B
(STRB) are available for general-purpose parallel input/output (I/O). In
this mode, all software needed to control the MCU is contained in
internal resources. If present, read-only memory (ROM) and/or erasable,
programmable read-only memory (EPROM) will always be enabled out
of reset, ensuring that the reset and interrupt vectors will be available at
locations $FFC0
–
$FFFF.
NOTE:
For the MC68HC811E2, the vector locations are the same; however,
they are contained in the 2048-byte EEPROM array.