
T
M
—
2
E
M
E
Figure B-1. EVBU Schematic Diagram
RXD
←
4
14
1
MCU 34
MCU 33
MCU 32
MCU 31
MCU 30
MCU 29
MCU 28
MCU 27
34
33
32
31
30
29
28
27
MCU 20
MCU 21
MCU 22
MCU 23
MCU 24
MCU 25
20
21
22
23
24
25
MCU 43
MCU 45
MCU 47
MCU 49
MCU 44
MCU 46
MCU 48
MCU 50
43
45
47
49
44
46
48
50
MCU 52
MCU 51
52
51
1
V
DD
PA0/IC3
PA1/IC2
PA2/IC1
PA3/OC5
PA4/OC4
PA5/OC3
PA6/OC2
PA7/OC1
25
PD0/RXD
PD1/TXD
PD2/MSO
PD3/MOSI
PD4/SCK
PD5/SS
PE0
PE1
PE2
PE3
PE4
PE5
PE6
PE7
V
RH
V
RL
V
SS
C7
1
μ
F
C8
0.1
μ
F
V
CC
MCU43
(PE0)
R4
47 K
2
J2
V
CC
1
3
MCU52 (V
RH
)
R3
1 K
C9
0.1
μ
F
V
CC
GND
N
1
U2
V
CC
2
3
INPUT
RESET
GND
MC34064P
V
CC
MCU17 (RESET)
RN1A
47 K
2
1
SW1
Notes:
1. Default cut traces installed from factory on bottom of the board.
2. X1 is shipped as a ceramic resonator with built-in capacitors. Holes are provided for a crystal and two capacitors.
MASTER RESET
MCU21 (PD1/TXD)
MCU20 (PD0/RXD)
1
2
J9
J8
2
1
NOTE 1
NOTE 1
V
CC
RN1E
47 K
6
1
PB0/A8
PB1/A9
PB2/A10
PB3/A11
PB4/A12
PB5/A13
PB6/A14
PB7/A15
PC0/AD0
PC1/AD1
PC2/AD2
PC3/AD3
PC4/AD4
PC5/AD5
PC6/AD6
PC7/AD7
E
STRB/R/W
STRA/AS
RESET
IRQ
XIRQ
MODA/LIR
MODB/V
STBY
EXTAL
XTAL
R2
10 M
X1
8 MHz
C6
27 pF
C5
27 pF
NOTE 2
5
6
4
MCU5
MCU6
MCU4
MCU17
MCU19
MCU18
MCU3
MCU2
17
19
18
3
2
42
41
40
39
38
37
36
35
MCU42
MCU41
MCU40
MCU39
MCU38
MCU37
MCU36
MCU35
9
MCU9
MCU10
MCU11
MCU12
MCU13
MCU14
MCU15
MCU16
10
11
12
13
14
15
16
7
8
MC68HC11E9FN
U3
MCU18 (XIRQ)
MCU31 (PA3/OC5)
MCU19 (IRQ)
MCU3
(MODA/LIR)
MCU2
(MODB/V
STBY
)
MCU8
MCU7
J6
2
1
J5
2
1
2
1
V
CC
1
RN1D
47 K
5
J7
V
CC
1
RN1C
47 K
4
V
CC
1
RN1B
47 K
3
V
CC
R1
47 K
NOTE 1
2
1
J3
J4
2
1
USER
’
S TERMINAL OR PC
MCU [2 . . . 52]
13
25
12
24
11
23
10
22
9
21
8
20
7
19
6
18
5
17
4
16
3
15
2
NC
V
CC
V
CC
C1+
C1
–
C2+
C2
–
DI1
DD1
DI2
DD2
DI3
DD3
V
CC
MC145407
C11
0.1
μ
F
20
18
1
3
15
16
13
14
11
12
19
V
DD
V
SS
TX1
RX1
TX2
RX2
TX3
RX3
GND
17
6
5
8
7
10
9
2
U4
V
CC
C14
10
μ
F
20 V
2
1
J15
NOTE 1
DCD
DTR
DSR
CTS
TXD
→
P2
CONNECTOR DB25
+
+
+
+
C10
C12
C13