
28F800C3, 28F160C3, 28F320C3, 28F640C3
2
3UHOLPLQDU\
1.1
Product Overview
Intel provides secure low voltage memory solutions with the Advanced Boot Block family of
products. A new block locking feature allows instant locking/unlocking of any block with zero-
latency. A 128-bit protection register allows unique flash device identification.
Discrete supply pins provide single voltage read, program, and erase capability at 2.7 V while also
allowing 12 V V
PP
for faster production programming. Improved 12 V, a new feature designed to
reduce external logic, simplifies board designs when combining 12 V production programming
with 2.7 V in-field programming.
The 3 Volt Advanced+ Boot Block flash memory products are available in x16 packages in the
following densities: (see
Section 5.0, “Ordering Information” on page 40
)
8-Mbit (8,388,608 bit) flash memories organized as 512 Kwords of 16 bits each
16-Mbit (16,777,216 bit) flash memories organized as 1024 Kwords of 16 bits each
32-Mbit (33,554,432 bit) flash memories organized as 2048 Kwords of 16 bits each
64-Mbit (67,108,864 bit) flash memories organized as 4096 Kwords of 16 bits each
Eight 4-Kword parameter blocks are located at either the top (denoted by -T suffix) or the bottom
(-B suffix) of the address map in order to accommodate different microprocessor protocols for
kernel code location. The remaining memory is grouped into 64-Kbyte main blocks (see
Appendix
E
).
All blocks can be locked or unlocked instantly to provide complete protection for code or data (see
Section 3.3, “Flexible Block Locking” on page 15
for details).
The Command User Interface (CUI) serves as the interface between the microprocessor or
microcontroller and the internal operation of the flash memory. The internal Write State Machine
(WSM) automatically executes the algorithms and timings necessary for program and erase
operations, including verification, thereby unburdening the microprocessor or microcontroller. The
status register indicates the status of the WSM by signifying block erase or word program
completion and status.
Program and erase automation allows program and erase operations to be executed using an
industry-standard two-write command sequence to the CUI. Program operations are performed in
word increments. Erase operations erase all locations within a block simultaneously. Both program
and erase operations can be suspended by the system software in order to read from any other
block. In addition, data can be programmed to another block during an erase suspend.
The 3 Volt Advanced+ Boot Block flash memories offer two low power savings features:
Automatic Power Savings (APS) and standby mode. The device automatically enters APS mode
following the completion of a read cycle. Standby mode is initiated when the system deselects the
device by driving CE# inactive. Combined, these two power savings features significantly reduce
power consumption.
The device can be reset by lowering RP# to GND. This provides CPU-memory reset
synchronization and additional protection against bus noise that may occur during system reset and
power-up/down sequences (see
Section 3.5
and
Section 3.6
).
Refer to
Section 4.4, “DC Characteristics” on page 25
for complete current and voltage
specifications. Refer to
Section 4.5
and
Section 4.6
for read and write performance specifications.
Program and erase times and shown in
Section 4.7
.