
28F800C3, 28F160C3, 28F320C3, 28F640C3
3UHOLPLQDU\
55
C.7
Intel-Specific Extended Query Table
Certain flash features and commands are optional. The Intel
-
Specific Extended Query table
specifies this and other similar types of information.
Table 19. Primary-Vendor Specific Extended Query
Offset(1)
P = 35h
Length
Description
(Optional Flash Features and Commands)
Address
Hex Code
Value
(P+0)h
(P+1)h
(P+2)h
3
Primary extended query table
Unique ASCII string “PRI”
35:
36:
37:
--50
--52
--49
“P”
“R”
“I”
(P+3)h
1
Major version number, ASCII
38:
--31
“1”
(P+4)h
1
Minor version number, ASCII
39:
--30
“0”
(P+5)h
(P+6)h
(P+7)h
(P+8)h
4
Optional feature and command support (1=yes,
0=no)
bits 9–31 are reserved; undefined bits are “0.” If
bit 31 is “1” then another 31 bit field of optional
features follows at the end of the bit-30 field.
3A:
3B:
3C:
3D:
--66
--00
--00
--00
bit 0 Chip erase supported
bit 1 Suspend erase supported
bit 2 Suspend program supported
bit 3 Legacy lock/unlock supported
bit 4 Queued erase supported
bit 5 Instant individual block locking supported
bit 6 Protection bits supported
bit 7 Page mode read supported
bit 8 Synchronous read supported
bit 0 = 0
bit 1 = 1
bit 2 = 1
bit 3 = 0
bit 4 = 0
bit 5 = 1
bit 6 = 1
bit 7 = 0
bit 8 = 0
No
Yes
Yes
No
No
Yes
Yes
No
No
(P+9)h
1
Supported functions after suspend: Read Array,
Status, Query
Other supported operations are:
bits 1–7 reserved; undefined bits are “0”
3E:
--01
bit 0 Program supported after erase suspend
bit 0 = 1
Yes
(P+A)h
(P+B)h
2
Block status register mask
bits 2–15 are Reserved; undefined bits are “0”
bit 0 Block Lock-Bit Status Register active
bit 1 Block Lock-Down Bit Status active
3F:
--03
40:
--00
bit 0 = 1
Yes
bit 1 = 1
Yes
(P+C)h
1
V
logic supply highest performance program/
erase voltage
bits 0–3 BCD value in 100 mV
bits 4–7 BCD value in volts
41:
--33
3.3 V
(P+D)h
1
V
optimum program/erase supply voltage
bits 0–3 BCD value in 100 mV
bits 4–7 HEX value in volts
42:
--C0
12.0 V