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參數(shù)資料
| 型號： | 28F640C3 |
| 廠商： | Intel Corp. |
| 英文描述： | 3 Volt Advanced Boot Block Flash Memory(3 V 高級快速引導塊閃速存儲器) |
| 中文描述： | 3伏高級啟動塊閃存（3伏高級快速引導塊閃速存儲器） |
| 文件頁數(shù)： | 7/70頁 |
| 文件大?。?/td> | 894K |
| 代理商： | 28F640C3 |
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28F800C3, 28F160C3, 28F320C3, 28F640C3
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1
1.0
Introduction
This document contains the specifications for the 3 Volt Advanced+ Boot Block flash memory
family. These flash memories add features which can be used to enhance the security of systems:
instant block locking and a protection register.
Throughout this document, the term “2.7 V” refers to the full voltage range 2.7 V–3.6 V (except
where noted otherwise) and “V
PP
= 12 V” refers to 12 V ±5%.
Section 1.0
and
Section 2.0
provide
an overview of the flash memory family including applications, pinouts, pin descriptions and
memory organization.
Section 3.0
describes the operation of these products, with
Section 4.0
providing the operating specifications. Ordering information is outlined in
Section 5.0
, and
additional reference material is located in
Section 6.0
.
The 3 Volt Advanced+ Boot Block flash memory features:
Zero-latency, flexible block locking
128-bit Protection Register
Simple system implementation for 12 V production programming with 2.7 V in-field
programming
Ultra-low power operation at 2.7 V
Minimum 100,000 block erase cycles
Common Flash Interface for software query of device specs and features
NOTES:
1.
8-Mbit density not available in μBGA* CSP.
2. See Specification Update for changes to 32-Mbit devices (order 297938).
3. V
CC
Max = 3.3 V on 32-Mbit and 64-Mbit devices.
Table 1. 3 Volt Advanced+ Boot Block Feature Summary
Feature
8 Mbit
(1)
, 16 Mbit, 32 Mbit
(2)
Reference
V
CC
Operating Voltage
V
PP
Voltage
V
CCQ
I/O Voltage
Bus Width
2.7 V – 3.6 V
(3)
Table 8
Table 8
Provides complete write protection with optional 12 V Fast Programming
2.7 V– 3.6 V
16-bit
8 Mbit: 90, 110 @ 2.7 V and 80, 100 @ 3.0 V
16 Mbit: 70, 80, 90, 110 @ 2.7 V and 70, 80, 100 @ 3.0 V
32 Mbit: 80, 90, 100, 110 @ 2.7 V and 80, 90, 100 @ 3.0 V
64 Mbit: 90, 100 @ 2.7 V and 90, 100 @ 3.0 V
8 x 4-Kword parameter
8-Mb: 15 x 32-Kword main
16-Mb: 31 x 32-Kword main
32-Mb: 63 x 32-Kword main
64-Mb: 127 x 32-Kword main
Extended: –40 °C to +85 °C
100,000 cycles
48-Lead TSOP
48-Ball
μ
BGA* CSP
(1)
, 48-Ball VF BGA, Easy BGA
Flexible locking of any block with zero latency
64-bit unique device number, 64-bit user programmable
Table 2
Speed (ns)
Section 4.4
Blocking (top or bottom)
Appendix 2.2
Appendix E
Operating Temperature
Program/Erase Cycling
Table 8
Table 8
Packages
Figure 1
,
2 and 3
Block Locking
Protection Register
Section 3.3
Section 3.4
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| 28F640C3BC80 | 制造商: 功能描述: 制造商:undefined 功能描述: |
| 28F640J3C120 | 制造商: 功能描述: 制造商:undefined 功能描述: |
| 28F640J3C-120 | 制造商: 功能描述: 制造商:undefined 功能描述: |
| 28F640J3D75 | 制造商:Intel 功能描述: 制造商: 功能描述: 制造商:undefined 功能描述: |
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