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參數(shù)資料
| 型號(hào)： | 28F640C3 |
| 廠商： | Intel Corp. |
| 英文描述： | 3 Volt Advanced Boot Block Flash Memory(3 V 高級(jí)快速引導(dǎo)塊閃速存儲(chǔ)器) |
| 中文描述： | 3伏高級(jí)啟動(dòng)塊閃存（3伏高級(jí)快速引導(dǎo)塊閃速存儲(chǔ)器） |
| 文件頁(yè)數(shù)： | 56/70頁(yè) |
| 文件大?。?/td> | 894K |
| 代理商： | 28F640C3 |
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28F800C3, 28F160C3, 28F320C3, 28F640C3
50
3UHOLPLQDU\
Appendix C Common Flash Interface Query Structure
This appendix defines the data structure or “database” returned by the Common Flash Interface
(CFI) Query command. System software should parse this structure to gain critical information
such as block size, density, x8/x16, and electrical specifications. Once this information has been
obtained, the software will know which command sets to use to enable flash writes, block erases,
and otherwise control the flash component. The Query is part of an overall specification for
multiple command set and control interface descriptions called Common Flash Interface, or CFI.
C.1
Query Structure Output
The Query “database” allows system software to gain information for controlling the flash
component. This section describes the device’s CFI-compliant interface that allows the host system
to access Query data.
Query data are always presented on the lowest-order data outputs (DQ
0-7
) only. The numerical
offset value is the address relative to the maximum bus width supported by the device. On this
family of devices, the Query table device starting address is a 10h, which is a word address for x16
devices.
For a word-wide (x16) device, the first two bytes of the Query structure, “Q” and ”R” in ASCII,
appear on the low byte at word addresses 10h and 11h. This CFI-compliant device outputs 00H
data on upper bytes. Thus, the device outputs ASCII “Q” in the low byte (DQ
0-7
) and 00h in the
high byte (DQ
8-15
).
At Query addresses containing two or more bytes of information, the least significant data byte is
presented at the lower address, and the most significant data byte is presented at the higher address.
In all of the following tables, addresses and data are represented in hexadecimal notation, so the
“h” suffix has been dropped. In addition, since the upper byte of word-wide devices is always
“00h,” the leading “00” has been dropped from the table notation and only the lower byte value is
shown. Any x16 device outputs can be assumed to have 00h on the upper byte in this mode.
Table 12. Summary of Query Structure Output As a Function of Device and Mode
Device
Hex
Offset
Code
ASCII
Value
Device Addresses
10:
51
“Q”
11:
52
“R”
12:
59
“Y”
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 28F640J3C-120 | Intel StrataFlash Memory (J3) |
| 28LV64A | 64K (8K x 8) Low Voltage CMOS EEPROM(低壓,64K位, CMOS 并行EEPROM) |
| 28M0U | 60V 300mA MONOLITHIC DIODE ARRAY |
| 28M0DC | 60V 300mA MONOLITHIC DIODE ARRAY |
| 28M0DS | 60V 300mA MONOLITHIC DIODE ARRAY |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 28F640C3BC80 | 制造商: 功能描述: 制造商:undefined 功能描述: |
| 28F640J3C120 | 制造商: 功能描述: 制造商:undefined 功能描述: |
| 28F640J3C-120 | 制造商: 功能描述: 制造商:undefined 功能描述: |
| 28F640J3D75 | 制造商:Intel 功能描述: 制造商: 功能描述: 制造商:undefined 功能描述: |
| 28F640J5 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:5 Volt Intel StrataFlash? Memory |
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