- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄371436 > 28F640C3 (Intel Corp.) 3 Volt Advanced Boot Block Flash Memory(3 V 高級快速引導(dǎo)塊閃速存儲器) PDF資料下載
參數(shù)資料
| 型號： | 28F640C3 |
| 廠商： | Intel Corp. |
| 英文描述： | 3 Volt Advanced Boot Block Flash Memory(3 V 高級快速引導(dǎo)塊閃速存儲器) |
| 中文描述： | 3伏高級啟動塊閃存（3伏高級快速引導(dǎo)塊閃速存儲器） |
| 文件頁數(shù)： | 13/70頁 |
| 文件大小： | 894K |
| 代理商： | 28F640C3 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁當(dāng)前第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁
28F800C3, 28F160C3, 28F320C3, 28F640C3
3UHOLPLQDU\
7
2.2
Block Organization
The 3 Volt Advanced+ Boot Block is an asymmetrically-blocked architecture that enables system
integration of code and data within a single flash device. Each block can be erased independently
of the others up to 100,000 times. For the address locations of each block, see the memory maps in
Appendix E
.
2.2.1
Parameter Blocks
The 3 Volt Advanced+ Boot Block flash memory architecture includes parameter blocks to
facilitate storage of frequently updated small parameters (i.e., data that would normally be stored in
an EEPROM). Each device contains eight parameter blocks of 4 Kwords (4,096 words).
2.2.2
Main Blocks
After the parameter blocks, the remainder of the array is divided into 32-Kword (32,768 words)
main blocks for data or code storage. Each 8-Mbit, 16-Mbit, 32-Mbit, or 64-Mbit device contains
15, 31, 63, or 127 main blocks, respectively.
3.0
Principles of Operation
The 3 Volt Advanced+ Boot Block flash memory family utilizes a CUI and automated algorithms
to simplify program and erase operations. The CUI allows for 100% CMOS
-
level control inputs
and fixed power supplies during erasure and programming.
The internal WSM completely automates program and erase operations while the CUI signals the
start of an operation and the status register reports status. The CUI handles the WE# interface to the
data and address latches, as well as system status requests during WSM operation.
3.1
Bus Operation
The 3 Volt Advanced+ Boot Block flash memory devices read, program and erase in
-
system via
the local CPU or microcontroller. All bus cycles to or from the flash memory conform to standard
microcontroller bus cycles. Four control pins dictate the data flow in and out of the flash
component: CE#, OE#, WE# and RP#. These bus operations are summarized in
Table 3 on page 8
.
3.1.1
Read
The flash memory has four read modes available: read array, read configuration, read status and
read query. These modes are accessible independent of the V
PP
voltage. The appropriate read mode
command must be issued to the CUI to enter the corresponding mode. Upon initial device power
-
up or after exit from reset, the device automatically defaults to read array mode.
CE# and OE# must be driven active to obtain data at the outputs. CE# is the device selection
control; when active it enables the flash memory device. OE# is the data output control and it
drives the selected memory data onto the I/O bus. For all read modes, WE# and RP# must be at
V
IH
.
Figure 8, “AC Waveform: Read Operations” on page 32
illustrates a read cycle.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 28F640J3C-120 | Intel StrataFlash Memory (J3) |
| 28LV64A | 64K (8K x 8) Low Voltage CMOS EEPROM(低壓,64K位, CMOS 并行EEPROM) |
| 28M0U | 60V 300mA MONOLITHIC DIODE ARRAY |
| 28M0DC | 60V 300mA MONOLITHIC DIODE ARRAY |
| 28M0DS | 60V 300mA MONOLITHIC DIODE ARRAY |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 28F640C3BC80 | 制造商: 功能描述: 制造商:undefined 功能描述: |
| 28F640J3C120 | 制造商: 功能描述: 制造商:undefined 功能描述: |
| 28F640J3C-120 | 制造商: 功能描述: 制造商:undefined 功能描述: |
| 28F640J3D75 | 制造商:Intel 功能描述: 制造商: 功能描述: 制造商:undefined 功能描述: |
| 28F640J5 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:5 Volt Intel StrataFlash? Memory |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。