
Preliminary Data Sheet, Rev. 1
October 2000
TMXF28155 Super Mapper
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
29
Lucent Technologies Inc.
Overview
(continued)
Multiplex Section Protection (MSP 1+1)
The TMUX block supports a payload 1+1 protection switch. In the receive direction, this occurs prior to pointer
interpretation. If the protection switch is activated, then the data is selected from the receive protection interface
rather than from the high-speed input path.
In the transmit direction, the signal is broadcast to the high-speed output path and the protection interface.
The interface consists of a 155.52 MHz or 51.84 MHz clock, data, and sync pulse in each direction.
Pointer Interpreter
This state machine implements the pointer interpretation algorithm described in ETS 300 417-1-1: January 1996—
Annex B.
The pointer interpreter evaluates the current pointer state for the normal state, path AIS state, or LOP (loss of
pointer) conditions, as well as pointer increments and decrements. The current pointer state and any changes in
pointer condition are reported to the control system. The number of consecutive frames for invalid pointer and
invalid concatenation indication is fixed at nine.
Path Termination Function
This function is performed on either all three STS-1s or on the VC-4 POH only.
It includes on the receive side: J1 monitoring, B3 BIP-8 checking, C2 signal label monitoring, REI-P and RDI-P
detection, H4 multiframe monitoring; F2, F3, and K3 automatic protection switch monitoring, N1 tandem connec-
tion monitoring, signal degrade BER and signal fail BER detection; path overhead access channel (RPOAC) drop,
AIS-P/HO-AIS insertion, and automatic AIS generation (with individual inhibit).
The J1 monitor provides five modes of operation on a programmable length (1byte—64 bytes) of the trace identi-
fier: cyclic checking against the last received sequence, compare against a programmed sequence, SONET fram-
ing mode, SDH framing mode, and consecutive consistent occurrences of a new pattern.
B3 is monitored either in bit or block mode. Provisionable N-times detection counters are implemented for C2, F2,
F3, N1, and K3 bytes. The K3 APS byte and N1 TCM byte can be monitored as an entire 8-bit word or two 4-bit nib-
bles.
The receive path overhead access channel (RPOAC) provides access to all the path overhead bytes. Even or odd
parity is calculated over all bytes. It has a data rate of 8 bytes per 8 kHz frame and consists of clock, data, and an
8 kHz sync pulse.
In the transmit direction, J1 path trace insertion, B3 calculation and insertion, C2 signal label insertion, REI-P and
RDI-P insertion; F2 insertion, H4 multiframe insertion, F3 path user byte insertion, K3 insertion, N1 byte insertion,
and AIS-P insertion via POAC or software control is supported.
The transmit path overhead access channel (TPOAC) allows the insertion of all overhead bytes besides B3 which
is automatically calculated. Even or odd parity is checked over all bytes. Bytes which are not enabled for insertion
are set to a all ones or all zeros stuff value. The super mapper sources a clock and an 8 kHz sync pulse and
receives the data at a rate of 8 bytes per 8 kHz frame.