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參數(shù)資料
| 型號(hào)： | T7256A |
| 英文描述： | Compliance with the New ETSI PSD Requirement |
| 中文描述： | 符合新的ETSI PSD的要求 |
| 文件頁數(shù)： | 97/116頁 |
| 文件大?。?/td> | 1056K |
| 代理商： | T7256A |
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Data Sheet
January 1998
T7256 Single-Chip NT1 (SCNT1) Transceiver
Lucent Technologies Inc.
93
Questions and Answers
(continued)
S/T-Interface
(continued)
A36:
(continued)
T7256 Transmit to T7903/T7250C Receive
a) Transmitter Load:
The T7256 S/T line interface transformer nor-
mally has a turns ratio of 2.5, and the trans-
mitter drives a line-side load of 50
.
Reflecting this impedance to the device side
of the transformer results in 312.5
(50
x
N
2
). This resistance, combined with the 242
total resistance of the device-side resistors,
results in a total of 554.5
that the transmitter
typically drives. So, to optimize the transmitter
part of the circuit based on the load the trans-
mitter expects to drive, the transmitter should
see a total resistance of approximately
554.5
.
T7903: In this case, the T7256 transmitter is
driving into a transformer with a turns ratio of
2.0. The pulse amplitude that the transmitter
must generate on the device side of the trans-
former is 1.5 V (resulting in a 750 mV pulse on
the line in accordance with the standards).
The T7256 transmitter circuit is a current
source of 6.0 mA. To generate a voltage of
1.5 V with 6.0 mA requires a resistance of 1.5/
0.006 = 250
, which is 62.5
when reflected
to the device side of the transformer. This
impedance should consist of jumper-select-
able 100
and 167
resistors as illustrated
in Figure 39. The table below lists the jumper
settings for each possible configuration.
The total impedance the T7256 must drive
(from the first paragraph of this section) is
554.5
, and the impedance across the
transformer leads is 250
(from the second
paragraph). The remaining 554.5
– 250
=
304.5
is divided equally between the posi-
tive and negative transmitter outputs, requir-
ing 152
in each leg. We can accomplish this
with a 143
resistor on the device side of the
diode bridge and a 10
resistor on the line
side of the bridge. The resistance is split in
this way to provide 10
of current limiting
through the diode bridge when the bridge is
conducting (similar to the T7903 transmitter
circuit).
T7250C: Referring to Figure 40, if we use the
same T7256 S/T transmitter line interface circuit
as in the normal (stand-alone NT) case, the
T7256 transmitter will see the 554.5
load that it
normally expects to drive and is thus optimized in
terms of the load. The 100
terminations shown
are user selected per the preceding table.
b) Receiver Levels:
The T7903 will see the correct pulse levels by
design. In the preceding section, the T7256
transmit circuit was designed to produce
750 mV pulses on the line. The T7903
receiver is attached directly to the device side
of the transformer, so it will see the 1.5 V
pulse levels that it expects to see.
T7903: The T7903 S/T line interface trans-
former has a turns ratio of 2.0. The T7903
receiver thus expects to see nominal pulse
levels of 750 mV x 2.0 = 1.5 V at the device
side of the transformer. The T7256 transmitter
section was designed to produce 750 mV
pulses on the S/T line (as would an external
TE on a 0-length loop). That voltage reflected
back to the device side of the T7901 trans-
former is 750 mV x 2.0 = 1.5 V, so the T7901
sees the pulse level it expects when a 750 mV
pulse is present on the line.
T7250C: The T7250C S/T line interface trans-
former has a turns ratio of 2.5. The T7250C
receiver thus expects to see nominal pulse
levels of 750 mV x 2.5 = 1.875 V at the device
side of the transformer. The T7256 transmitter
section was designed to produce 750 mV
pulses on the S/T line (as would an external
TE on a 0-length loop). That voltage reflected
back to the device side of the T7250C trans-
former is 750 mV x 2.5 = 1.875 V, so the
T7250C see the pulse level it expects when a
750 mV pulse is present on the line.
c) Receiver Bias:
The receiver bias is sufficiently small that it is
not an issue (see preceding sections).
Configuration
JMP3
JMP4
Integrated NT1 Used as NT1
(No External NT1 Connected)
No External TE
Connected
Unterminated External
TE Connected
Terminated (100
)
External TE connected
Installed
Installed
Installed
Installed
Installed
Not
Installed
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