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Data Sheet
January 1998
T7288 CEPT/E1 Line Interface
Features
I
Fully integrated 2.048 Mbits/s line interface
I
Intended for use in systems that must comply with
ITU-T specifications G.703, G.823, I.431, G.732,
G.735—G.739
or 120
Monolithic clock recovery
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Pin-selectable 75
operation
I
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Low power dissipation:
— 100 mW for 120
— 108 mW for 75
coaxial, typical
twisted pair, typical
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Minimal external circuitry required
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Robust frequency acquisition/phase-locked loop
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Pin-selectable HDB3 encoder and decoder
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Loopback modes for fault isolation
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Multiple link-status and alarm features
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Single-rail/dual-rail interface
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Pin compatible with the LC1135B device
Description
The Lucent Technologies Microelectronics Group
T7288 CEPT/E1 Line Interface is an integrated circuit
that provides a 2.048 Mbits/s line interface to either
twisted-pair or coaxial cable as specified in ITU-T
requirements G.703, G.823, I.431, G.732, and
G.735—G.739. The device performs receive pulse
regeneration, timing recovery, and transmit pulse
driving functions. The T7288 device is manufactured
by using low-power CMOS technology and is avail-
able in a 28-pin, plastic DIP or in a 28-pin, plastic
SOJ package for surface mounting. The T7288
device is functionally compatible with the LC1135B
device. The digital circuitry is shown in Figure 1; the
analog circuitry is shown in Figure 6.
Figure 1. Digital Block Diagram
5-4343(C)
M
T1
R1
RECEIVE
SD
LOS
M
M
LOSS OF
CLOCK
DETECTION
M
M
M
T2
R2
ZS
TBC
BCLK
TRANSMIT
BLUE (AIS)
SIGNAL
GENERATOR
LDC
LP3
BIPOLAR
VIOLATION
DETECTION
HDB3
CODE
VIOLATION
DETECTION
M
M
M
M
SINGLE-
RAIL
CON-
VERTER
HDB3
DE-
CODER
M
M
HDB3/TNDATA
M
(AIS)
GENERATOR
M
M
M
M
SIDUAL-
RAIL
CONVERTER
ALMT
VDDA
VDD
GNDD
GNDA
ALL ANALOG
FUNCTIONS
OUPUT
DRIVERS
AND
LOGIC
OUPUT
DRIVERS
AND
LOGIC
ALL ANALOG
FUNCTIONS
HD3
ENCODER
M
M
SR/DR
HDB3/TNDATA
RBC SR/DR
FLM
RDATA/
VIO/
RNDATA
TDATA/
TPDATA
HDB3/
TNDATA
RCLK
LP1
+5 V
+5 V
GND
GND
LP2
TCLK