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參數(shù)資料
| 型號(hào)： | T7256A |
| 英文描述： | Compliance with the New ETSI PSD Requirement |
| 中文描述： | 符合新的ETSI PSD的要求 |
| 文件頁(yè)數(shù)： | 50/116頁(yè) |
| 文件大?。?/td> | 1056K |
| 代理商： | T7256A |
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Data Sheet
January 1998
T7256 Single-Chip NT1 (SCNT1) Transceiver
46
Lucent Technologies Inc.
STLED Description
The STLED pin is used to drive an LED and provides a
visual indication of the current state of the T7256. The
STLED control is typically configured to illuminate the
LED when STLED is LOW. This convention will be
assumed throughout this section.
Table 28 describes the four states of STLED, the list of
system conditions that produce the state, and the cor-
responding ANSI states, as defined in ANSI T1.601-
1992 (Tables C1 and C4) and ETSI ETR 080-1992
(Tables A3 and I2).
Note:
The ETSI state names begin with the letters
NT instead of H. Also, the ETSI state tables
do not include a state NT11 because it is con-
sidered identical to state NT6. Table A3 of the
ETSI standard contains the additional states
NT6A, NT7A, and NT8A to describe states
related to the eoc loopback 2 (2B+D loop-
back). The most likely ANSI state for each
STLED state is shown in bold typeface below.
The flow chart in Figure 18 illustrates the priority of the
logic signals which control the STLED pin. In the deci-
sion diamonds, those names in all capital letters
denote T7256 register bit names. The RESET,
AUTOCTL, AUTOEOC, and STOA are R/W bits con-
trolled by the user via the microprocessor interface.
The XACT, OOF, and AIB bits are read-only bits deter-
mined by the internal logic based on system events
and can be monitored by the user via the microproces-
sor interface. Other names in the decision diamonds
(quiet mode, ILOSS mode, Loop2, INFO 2, INFO 4)
represent system conditions that cannot be directly
monitored or controlled by the microprocessor inter-
face.
Table 28. STLED States
*
These are ETSI DTR/TM-3002 states not yet defined in ANSI T1.601, although they are defined in revised ANSI tables which are currently on
the living list (i.e., not yet an official part of the standards document).
State H8(a) is most likely when U-interface bit uoa = 0.
STLED State
List of System Conditions that
Can Cause STLED State
RESET (pin 43) = 0
AUTOCTL = 0 (register GR0, bit 3), or
AUTOEOC = 0 (register GR0, bit 4), or
STOA = 0 (register GR2, bit 7)
U and S/T not active
RESET = 0 (register GR0, bit 0)
Quiet mode active, or
ILOSS mode active
U activation attempt in progress
AIB = 0 (register CFR1, bit 6)
eoc-initiated 2B+D loopback active
U active, S/T not fully active
Corresponding ANSI States
High (LED off)
NA
H0,
H1
, H10, H12
NA
8 Hz Flashing
H2, H3, H4
H7,
H8
NT6A*, NT7A*,
NT8A
*
H6, H6(a),
H7
, H11, H8(a)
,
H8(b), H8(c)
H8
1 Hz Flashing
Low (LED on)
U and S/T fully active
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