- 您現(xiàn)在的位置：買賣IC網 > PDF目錄383876 > T7256A Compliance with the New ETSI PSD Requirement PDF資料下載
參數資料
| 型號： | T7256A |
| 英文描述： | Compliance with the New ETSI PSD Requirement |
| 中文描述： | 符合新的ETSI PSD的要求 |
| 文件頁數： | 20/116頁 |
| 文件大?。?/td> | 1056K |
| 代理商： | T7256A |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁當前第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁
Data Sheet
January 1998
T7256 Single-Chip NT1 (SCNT1) Transceiver
16
Lucent Technologies Inc.
S/T-Interface Frame Structure
(continued)
The T7256 supports multiframing on the S/T-interface
in conjunction with an external microprocessor that is
used to enable multiframing and transmit and receive
S- and Q-channel messages. When multiframing is
enabled, the M bit in the NT-to-TE direction is set to a
one every 20 frames and the FA bit is set to one every
five frames. The TE recognizes these states and, in
returned frames immediately corresponding to those in
which the NT set the FA bit, replaces the FA bit it sends
to the NT with a Q bit (Q1 through Q4). Q1 is returned
for each frame in which both the M and FA bits were set
to one by the NT, with Q2 through Q4 following at five-
frame intervals. (See Figure 8.)
The S-bit position in the NT-to-TE direction is divided
into five 4-bit subchannels during multiframing: SC1—
SC5. Message sets for subchannels SC3—SC5 are
not currently defined, and a message set for SC2 is
defined only in ANSI T1.605, but not ITU I.430 (see the
S/T-Interface Multiframing Controller Description sec-
tion for more details). Figure 8 indicates the location of
the various S-subchannel bits during multiframing.
5-2481.b (C)
Figure 8. Multiframing—S Subchannels and Q Subchannels
9
1
9
5
4
20
1
2
3
7
8
10 11 12 13 14 15
FA = 1
18 19 20
1
2
19
6
16 17
FA = 1
5
4
20
2
3
7
8
10 11 12 13 14 15
18 19 20
1
2
19
6
16 17
FA = 1
FA = 1
FA = 1
FA = Q1
FA = Q2
FA = Q3
FA = Q4
FA = Q1
(NT TO TE)
M BIT = 1
IN FRAME #1
MARKS START
OF MULTIFRAME
(TE TO NT)
THE TE-TO-NT TRANSMISSION
HAS A NOMINAL 2-bit DELAY
RELATIVE TO THE NT-TO-TE FRAMES.
S BITS OCCUR IN BIT 37
OF EACH NT-TO-TE FRAME.
S-SUBCHANNEL #1 BITS—
SC11, SC12, SC13, AND SC14
APPEAR IN FRAMES 1, 6, 11,
AND 16.
S-SUBCHANNEL #2 BITS—
SC21, SC22, SC23, AND SC24
APPEAR IN FRAMES 2, 7, 12,
AND 17.
Q BITS OCCUR EVERY FIVE FRAMES. THERE ARE
FOUR Q BITS PER MULTIFRAME IN THE FA BIT
POSITION (BIT 14) OF FRAMES 1, 6, 11, AND 16.
20-FRAME MULTIFRAME
相關PDF資料 |
PDF描述 |
|---|---|
| T7288 | CEPT/E1 Line Interface(CEPT/E1 線接口) |
| T7290A | DS1/T1/CEPT/E1 Line Interface(DS1/T1/CEPT/E1 線接口) |
| T7295-1 | E3 Integrated Line Receiver(E3 集成線接收器) |
| T7295-6 | DS3/SONET STS-1 Integrated Line Receiver(DS3/SONET STS-1 集成線接收器) |
| T7296 | Integrated Line Transmitter(集成PCM線傳送器) |
相關代理商/技術參數 |
參數描述 |
|---|---|
| T7257 | 制造商:TE Connectivity 功能描述: |
| T-726 | 制造商:RHOMBUS-IND 制造商全稱:Rhombus Industries Inc. 功能描述:ADSL Line Interface Transformers |
| T7263 | 制造商:TE Connectivity 功能描述: |
| T7263A | 制造商:Toshiba America Electronic Components 功能描述:T7263A |
| T7264 | 制造商:TE Connectivity 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復。