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Data Sheet
January 1998
T7256 Single-Chip NT1 (SCNT1) Transceiver
24
Lucent Technologies Inc.
Microprocessor Interface Description
(continued)
Registers
(continued)
Table 6. Global Device Control—S/T-Interface (Address 02h)
(continued)
Reg
GR2
Default State
on RESET
R/W
R/W
Bit 7
STOA
1
Bit 6
ACTSEL
ACTMODE/
INT pin
Bit 5
TDMEN
1
Bit 4
U2BDLN
1
Bit 3
SXE
1
Bit 2
SRESET
1
Bit 1
Bit 0
FT
1
SPWRUD
1
Register
GR2
Bit
6
Symbol
ACTSEL
Name/Description
ACT Mode Select.
Controls the state of the transmitted ACT bit when an eoc
loopback 2 (2B+D loopback) is requested. The loopback 2 occurs automatical-
ly if AUTOEOC = 1 (register GR0, bit 4). Otherwise, bit U2BDLT (register
ECR0, bit 6) must be set to 0. The loopback is accomplished in the device by
looping the output of the S/T transmitter back to the input of the S/T receiver
at the device pins (i.e., as close to the S/T-interface as possible). The S/T
transceiver will ignore any signals transmitted by the TE, and the T7256 will
synchronize to its own transmit signal causing INFO 3 to be reported. The ini-
tial state of ACTSEL is determined by the state of the ACTMODE/INT pin on
the rising edge of RESET.
0—act = 0 during loopback 2 (per ANSI T1.601). The data received at the
NT is looped back towards the LT as soon as the 2B+D loopback is en-
abled.
1—act = 1 during loopback 2 after INFO 3 is recognized at the S/T-interface
(per ETSI ETR 080). The data received by the NT is not looped back to-
wards the LT until after ACT = 1 is received from the LT. Prior to this time,
2B+D data toward the LT is all 1s.
S/T Only Activation.
Set to 0 to force an S/T activation when the U-interface
is inactive. When the U-interface is active, this bit is ignored. STOA is reset to
1 upon the receipt of a U-interface tone, an INFO1 or INFO3 signal, or a 1-to-
0 transition of AUTOACT (register GR0, bit 6).
0—Attempt an S/T only activation.
1—No effect on device operation (default).
GR2
7
STOA