- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄383876 > T7256A Compliance with the New ETSI PSD Requirement PDF資料下載
參數(shù)資料
| 型號(hào)： | T7256A |
| 英文描述： | Compliance with the New ETSI PSD Requirement |
| 中文描述： | 符合新的ETSI PSD的要求 |
| 文件頁(yè)數(shù)： | 47/116頁(yè) |
| 文件大?。?/td> | 1056K |
| 代理商： | T7256A |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)當(dāng)前第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)
Data Sheet
January 1998
T7256 Single-Chip NT1 (SCNT1) Transceiver
Lucent Technologies Inc.
43
Data Flow Matrix Description
B1-, B2-, D-Channel Routing
The T7256 supports extremely flexible B1-, B2-, and D-
channel routing among major circuit blocks in order to
accommodate various applications. Channel routing is
controlled via the data flow control registers, DFR0 and
DFR1. Figure 16 shows a block diagram of the device
and the channel paths to and from the U transceiver,
S/T transceiver, and TDM bus interface. Channel flow is
determined by specifying the source of channel data at
the three points shown in the figure: (1) U transceiver
transmit input, (2) S/T transceiver transmit input, and (3)
TDM bus transmit input. Channel flow at the TDM bus
receive input (4) is determined, by default, from the set-
tings at the other three points. A switch matrix within the
data flow matrix block routes channels to and from the
specified points.
As an example, below are the register settings required
to configure the device as an NT1, with the B1 and B2
channels in both the U- to S/T- and S/T- to U-interface
directions made available on the TDM bus for monitor-
ing:
I
TDMEN = 0 (enables TDM bus).
I
UXB1 = 11, UXB2 = 11, UXD = 1 (routes S/T-inter-
face receive channels to U-interface transmitter).
I
SXB1 = 11, SXB2 = 11, SXD = 1 (routes U-interface
receive channels to S/T-interface transmitter).
I
TDMB1S = TDMB2S = 0 (brings out B1 and B2
channels in S/T- to U-interface direction to TDM bus).
I
TDMDS = 1 (D channel in S/T- to U-interface direc-
tion not brought out on TDM bus).
I
TDMB1U = TDMB2U = 0 (brings out B1 and B2
channels in U- to S/T-interface direction to TDM bus).
I
TDMDU = 1 (D channel in U- to S/T-interface direc-
tion not brought out on TDM bus).
Refer to the Board-Level Testing section for another
example of using the data flow matrix to route data.
5-2304 (C)
Figure 16. B1-, B2-, D-Channel Routing
TDM BUS INTFC.
μP INTERFACE
μP INTERFACE
DATA FLOW
CONTROLLER
SWITCH MATRIX
TDM BUS INTERFACE
TRANSMIT
RECEIVE
TRANSMIT
U TRANSCEIVER
S/T TRANSCEIVER
2
RECEIVE
3
1
4
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| T7288 | CEPT/E1 Line Interface(CEPT/E1 線接口) |
| T7290A | DS1/T1/CEPT/E1 Line Interface(DS1/T1/CEPT/E1 線接口) |
| T7295-1 | E3 Integrated Line Receiver(E3 集成線接收器) |
| T7295-6 | DS3/SONET STS-1 Integrated Line Receiver(DS3/SONET STS-1 集成線接收器) |
| T7296 | Integrated Line Transmitter(集成PCM線傳送器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| T7257 | 制造商:TE Connectivity 功能描述: |
| T-726 | 制造商:RHOMBUS-IND 制造商全稱(chēng):Rhombus Industries Inc. 功能描述:ADSL Line Interface Transformers |
| T7263 | 制造商:TE Connectivity 功能描述: |
| T7263A | 制造商:Toshiba America Electronic Components 功能描述:T7263A |
| T7264 | 制造商:TE Connectivity 功能描述: |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。