參數(shù)資料
型號(hào)： S-7600A
廠商： Seiko Instruments Inc.
英文描述： Hardware Specification (TCP/IP Network Stack LSI)
中文描述： 硬件規(guī)格（TCP / IP網(wǎng)絡(luò)堆棧大規(guī)模集成電路）
文件頁(yè)數(shù)： 9/60頁(yè)
文件大小： 371K
代理商： S-7600A
TCP/IP Network Stack LSI
S-7600A
Hardware Specification
Revision 1.3
Seiko Instruments Inc.
1-1
1. Introduction
1.1. Product Overview
The S-7600A is a LSI that integrates TCP/IP network stack. It offers your devices a quicker and easier
connectivity to a network with its on-chip serial interface and a static RAM that operates as a buffer.
Implementing this LSI into your system can significantly reduce your software development cost. Also its
low operating frequency gives benefits to the power consumption.
The S-7600A also supports a microprocessor interface via the iReady iAPI
TM
register set, and connection
to Physical Transport Layer Interface. iAPI consists of a set of register and operating definitions that allow
any micro controller system to interface with the internal modules.
1.2. Features
z
Industry standard protocols support :
TCP/IP
(Ver. 4.0)
PPP
(STD-51-compliant)
UDP
z
General purpose sockets :
Configured for two sockets
z
MPU interface :
68k/x80(MOTO/Intel) bus interface or Synchronous serial interface
z
Physical Transport Layer Interface :
Universal Asynchronous Receiver/Transmitter (UART)
z
Low clock rate :
Multiplied four by the bit-rate
z
Operating frequency :
256kHz typical
z
Low power consumption :
Full-transmitting Operating current consumption : 0.9mA typ.
Non-transmitting Operating current consumption : 150μA typ.
Standby current consumption : 1.0μA typ.
z
Stand-by mode :
held by RESET signal
z
Wide operating voltage range :
2. 4V to 3.6V
z
Easier application development :
portable iAPI
support
1.3. Benefits
z
z
Off-loads MIPS allowing system to operate with low end and low cost processors.
Consumes minimal power-up to 1/100 of competing solution.
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