參數(shù)資料
型號: S-7600A
廠商: Seiko Instruments Inc.
英文描述: Hardware Specification (TCP/IP Network Stack LSI)
中文描述: 硬件規(guī)格(TCP / IP網(wǎng)絡(luò)堆棧大規(guī)模集成電路)
文件頁數(shù): 33/60頁
文件大?。?/td> 371K
代理商: S-7600A
TCP/IP Network Stack LSI
S-7600A
Hardware Specification
Revision 1.3
Seiko Instruments Inc.
7-6
Table 7-10
Master Interrupt Register Descriptions (Continued)
Bit
Bit Name
Access
Description
2
PT_INT
R
Physical Transport Interrupt
The physical transport triggers this interrupt. An
application should check the
Serial Port Int
register
to determine the actual cause of the interrupt.
1
LINK_INT
R
Link Layer Interrupt
The link layer triggers this interrupt. An application
should check the
PPP Interrupt Code
register to
determine the actual cause of the interrupt.
0
SOCK_INT
R
Socket Interrupt
One of the sockets that need servicing causes this
interrupt. An application should check the
Socket
Interrupt
register to determine the actual socket
number.
7.3.5. Serial Port Configuration / Status Register (0x08)
(Read/Write, Default 0X0XX110B)
This register configures the serial port as shown in Table 7-11 and Table 7-12.
Table 7-11
Conf Status Register Bit Definitions
Bit
7
6
5
4
3
2
1
0
Def.
S_DAV
DCD
DSR/
HWFC
0
CTS
RI
DTR
RTS
SCTL
Default
0
1
1
0
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