參數(shù)資料
型號(hào): S-7600A
廠商: Seiko Instruments Inc.
英文描述: Hardware Specification (TCP/IP Network Stack LSI)
中文描述: 硬件規(guī)格(TCP / IP網(wǎng)絡(luò)堆棧大規(guī)模集成電路)
文件頁數(shù): 40/60頁
文件大小: 371K
代理商: S-7600A
TCP/IP Network Stack LSI
S-7600A
Hardware Specification
Revision 1.3
7-13
Seiko Instruments Inc.
7.3.15. Socket Status Mid Register (0x23)
(Read-Only, Default 0x00)
This read-only register reports other socket status conditions.
Table 7-25
Socket Status Mid Register Bit Definitions
Bit
Def.
Default
7
6
5
4
3
2
1
0
URG
0
RST
0
Term
0
ConU
0
TCP State
0x0
Table 7-26
Socket Status Mid Register Description
Bit
Bit Name
Access
Description
7
URG
R
This bit indicates the arrival of urgent data. Writing a “1” to the
URG
bit in the
Socket Interrupt
register (bit 7) clears this bit.
0 = No urgent data present
1 = Urgent data present
This bit indicates when the socket receives the RST signal from
the TCP peer.
0 = No RST received
1 = RST received
This bit indicates when the socket terminates from the source
and triggers an interrupt if the
Term_En
bit is set in the
Socket
Interrupt Mask High
register (0x2B). The interrupt mask setting
does not effect the reporting of this status bit.
0 = Normal Operating Condition
1 = Socket terminated from source
This bit becomes “1” when the S-7600A receives a TCP
segment with the
FIN
flag on. This means that the remote peer
has requested to close the TCP connection.
6
RST
R
5
Term
R
4
ConU
R
This bit indicates when the socket establishes a connection to a
host machine. The bit clears when the connection terminates (by
either end).
0 = No Connection Established
1 = Connection Established
These bits indicate the current TCP state.
0 = CLOSED
1 = SYN_SENT
2 = ESTABLISHED
3 = CLOSE_WAIT
4 = LAST_ACK
5 = FIN_WAIT1
6 = FIN_WAIT2
7 = CLOSING
8 = TIME_WAIT
9 = LISTEN
a = SYN_RECVD
3:0
TCP State
R
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