參數(shù)資料
型號(hào)： S-7600A
廠商： Seiko Instruments Inc.
英文描述： Hardware Specification (TCP/IP Network Stack LSI)
中文描述： 硬件規(guī)格（TCP / IP網(wǎng)絡(luò)堆棧大規(guī)模集成電路）
文件頁數(shù)： 49/60頁
文件大小： 371K
代理商： S-7600A
TCP/IP Network Stack LSI
S-7600A
Hardware Specification
Revision 1.3
Seiko Instruments Inc.
7-22
Bit
Bit Name
Access
Description
0
PPP_UP/SRst
R/W
When read, this bit indicates when the PPP layer establishes a
connection.
0 = PPP Connection down
1 = PPP Connection established
When written, this bit will reset the PPP engine. It is self-clearing
and goes not need to be written low for normal operations.
0 = PPP Normal operation
1 = PPP Reset
7.3.32. PPP Interrupt Code (0x61)
(Read-Only, Default 0x00)
This register indicates the interrupt condition that causes the PPP interrupt to trigger.
Table 7-53
PPP Interrupt Code Register Bit Definitions
Bit
7
6
5
4
3
2
1
0
Def.
PPP Interrupt Code
Default
0
Table 7-54
PPP Interrupt Error Codes
Error Code
Definition
0x00
Reserved
0x01
PPP Failed initial LCP negotiations
0x02
PPP Failed NCP negotiations
0x05
PAP Failed negotiations
7.3.33. PPP Max Retry, (0x62)
(Read/Write, Default 0x0A)
This register configures the maximum retry number. This number is used to determine the maximum
number of configuration requests that are sent during the PPP negotiation stage.
Table 7-55
PPP Max Retry Register
Bit
7
6
5
4
3
2
1
0
Def.
PPP Maximum Retry
Default
0x0
0xA
NOTE: Reserved bits are signified by a dash (-).
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