參數(shù)資料
型號(hào)： S-7600A
廠商： Seiko Instruments Inc.
英文描述： Hardware Specification (TCP/IP Network Stack LSI)
中文描述： 硬件規(guī)格（TCP / IP網(wǎng)絡(luò)堆棧大規(guī)模集成電路）
文件頁(yè)數(shù)： 47/60頁(yè)
文件大小： 371K
代理商： S-7600A
TCP/IP Network Stack LSI
S-7600A
Hardware Specification
Revision 1.3
Seiko Instruments Inc.
7-20
Table 7-46
Socket Status High Register Description
Bit
Bit Name
Access
Description
0
Snd_Bsy
R
This bit indicates that the current socket is busy
sending TCP segments. Before the socket is reset,
this bit should be 0.
0 = Socket not busy
1 = Socket busy
7.3.30. Their IP Address Registers (0x3C-0x3F)
(Read/Write, Default 0x00000000)
These registers indicate the destination IP address for the socket. For TCP client or UDP mode, this
value must be set prior to activating the socket. For TCP server mode, these register are automatically
setup on a connection with the peer’s IP address The registers can be written in any order.
Table 7-47
Their IP Address Register Bit Definitions (0x3C)
Bit
Def.
Default
7
6
Least significant byte of Destination IP address
0x00
5
4
3
2
1
0
Table 7-48
Their IP Address Register Bit Definitions (0x3D)
Bit
Def.
Default
7
6
5
4
3
2
1
0
3rd byte of Destination IP address
0x00
Table 7-49
Their IP Address Register Bit Definitions (0x3E)
Bit
Def.
Default
7
6
5
4
3
2
1
0
2nd byte of Destination IP address
0x00
Table 7-50
Their IP Address Register Bit Definitions (0x3F)
Bit
Def.
Default
7
6
5
4
3
2
1
0
Most significant byte of Destination IP address
0x00
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