參數(shù)資料
型號: S-7600A
廠商: Seiko Instruments Inc.
英文描述: Hardware Specification (TCP/IP Network Stack LSI)
中文描述: 硬件規(guī)格(TCP / IP網(wǎng)絡(luò)堆棧大規(guī)模集成電路)
文件頁數(shù): 37/60頁
文件大小: 371K
代理商: S-7600A
TCP/IP Network Stack LSI
S-7600A
Hardware Specification
Revision 1.3
Seiko Instruments Inc.
7-10
Table 7-19
Our IP Address Register Bit Definitions (0x12)
Bit
Def.
Default
7
6
5
4
3
2
1
0
2nd byte of the local IP address
0x00
Table 7-20
Our IP Address Register Bit Definitions (0x13)
Bit
Def.
Default
7
6
5
4
3
2
1
0
Most significant byte of the local IP address
0x00
7.3.11. Clock Divider Registers (0x1C-0x1D)
(Read/Write, Default
0x03E7)
These registers program the 1kHz clock generator. This clock is used internally for various S-7600A
timing functions. The following equation determines the value programmed into these registers:
clk Freq/1 kHz) - 1 = Divide Count
Where clk Freq is S-7600A clock frequency. Therefore, for a 1 MHz clock, the divide count equals 1M /
1kHz - 1= 999 = 0x03e7.
7.3.12. Index Register (0x20)
(Read/Write, Default 0x00)
This register must be programmed prior to accessing indexed socket registers. Valid programmed
values are 0x00 and 0x01. If the selected socket number has not changed since the last access, this
register not need to be reprogrammed.
Table 7-21
Index Register Bit Definition
Bit
Def.
Default
7
6
5
4
3
2
1
0
Socket Index [7:0]
0x00
Table 7-22
Index Register Description
Bit
Bit Name
Access
Description
7:0
Socket_Index
R/W
0x00 : General Socket 0 Selected
0x01: General Socket 1 Selected
All other values are reserved
7.3.13. Type of Service Register (TOS) (0x21)
(Read/Write, Default 0x00)
This register configures the TOS field in the IP header for outgoing datagrams. It is an optional setting
that defaults to 0x00.
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