參數(shù)資料
型號: MC68EC060RC50
廠商: Freescale Semiconductor
文件頁數(shù): 115/128頁
文件大?。?/td> 0K
描述: IC MPU 32BIT 50MHZ 206-PGA
標(biāo)準(zhǔn)包裝: 10
系列: M680x0
處理器類型: M680x0 32-位
速度: 50MHz
電壓: 3.3V
安裝類型: 通孔
封裝/外殼: 206-BEPGA
供應(yīng)商設(shè)備封裝: 206-PGA(47.25x47.25)
包裝: 托盤
Memory Management Unit
4-18
M68060 USER’S MANUAL
MOTOROLA
table for each demand, then the process of making such demands builds the translation
table.
For example, consider an operating system that is preparing the system to execute a previ-
ously unexecuted task that has no translation table. Rather than guessing what the memory-
usage requirements of the task are, the operating system creates a translation table for the
task that maps one page corresponding to the initial value of the program counter (PC) for
that task and one page corresponding to the initial stack pointer of the task, leaving the other
branches with invalid descriptors. All other branches of the translation table for this task
remain unallocated until the task requests access to the areas mapped by these branches.
This technique allows the operating system to construct a minimal translation table for each
task, conserving physical memory utilization and minimizing operating system overhead.
Figure 4-14. Translation Table Using Shared Tables
ROOT-LEVEL
TABLES
POINTER-LEVEL
TABLES
PAGE-LEVEL
TABLES
0 11101 10010 10100 001 X X XXXXX XXXXX X
ROOT INDEX
POINTER INDEX
PAGE INDEX
PAGE OFFSET
LOGICAL ADDRESS
$76543210 =
$3B
$15
$01
TABLE ENTRY # =
TABLE $3B
TABLE $15
TABLE $00
$3B
$EC
$54
$04
ADDRESS OFFSET =
FRAME ADDRESS*
ROOT POINTER
$15
$01
TASK A
TASK B
ROOT POINTER
W-BIT CLEAR
* PAGE FRAME ADDRESS SHARED BY TASK A AND B; WRITE PROTECTED FROM TASK A.
W-BIT SET
$00003000
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