參數(shù)資料
型號(hào): MC68EC060RC50
廠商: Freescale Semiconductor
文件頁數(shù): 113/128頁
文件大?。?/td> 0K
描述: IC MPU 32BIT 50MHZ 206-PGA
標(biāo)準(zhǔn)包裝: 10
系列: M680x0
處理器類型: M680x0 32-位
速度: 50MHz
電壓: 3.3V
安裝類型: 通孔
封裝/外殼: 206-BEPGA
供應(yīng)商設(shè)備封裝: 206-PGA(47.25x47.25)
包裝: 托盤
Memory Management Unit
4-16
M68060 USER’S MANUAL
MOTOROLA
4.2.4 Variations in Translation Table Structure
Several aspects of the MMU translation table structure are software configurable, allowing
the system designer flexibility to optimize the performance of the MMUs for a particular sys-
tem. The following paragraphs discuss the variations of the translation table structure.
4.2.4.1 INDIRECT ACTION. The MC68060 provides the ability to replace an entry in a page
table with a pointer to an alternate entry. The indirection capability allows multiple tasks to
share a physical page while maintaining only a single set of history information for the page
(i.e., the modified indication is maintained only in the single descriptor). The indirection
capability also allows the page frame to appear at arbitrarily different addresses in the logical
address spaces of each task.
Using the indirection capability, single entries or entire tables can be shared between multi-
ple tasks. Figure 4-13 illustrates two tasks sharing a page using indirect descriptors.
Figure 4-13. Translation Table Using Indirect Descriptors
ROOT-LEVEL
TABLES
POINTER-LEVEL
TABLES
PAGE-LEVEL
TABLES
0 11101 10010 10100 001 X X XXXXX XXXXX X
ROOT INDEX
POINTER INDEX
PAGE INDEX
PAGE OFFSET
LOGICAL ADDRESS
$76543210 =
$3B
$15
$01
TABLE ENTRY # =
TABLE $3B
TABLE $15
TABLE $00
TABLE $7F
TABLE $1F
TABLE $00
$3B
$EC
$54
$04
ADDRESS OFFSET =
$00001800
$00003000
$80000010
$15
$01
ROOT POINTER
TASK A
TASK B
ROOT POINTER
FRAME ADDRESS
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