參數(shù)資料
型號(hào)： LM98640W-MPR
廠商： NATIONAL SEMICONDUCTOR CORP
元件分類： 模擬信號(hào)調(diào)理
英文描述： SPECIALTY ANALOG CIRCUIT, CQFP68
封裝： CERAMIC, QFP-68
文件頁數(shù)： 50/50頁
文件大小： 1688K
代理商： LM98640W-MPR
LM98640QML Electrical Characteristics (Note 9)
The following specifications apply for VDD33 = 3.3V, VDD18 = 1.8V, C
L = 10pF, and fINCLK = 40MHz unless otherwise specified.
Symbol
Parameter
Conditions
Notes
Typical
Min
Max
Units
Sub-
groups
CMOS Digital Input DC Specifications (SCLK, SEN, SDI, CLPIN)
V
IH
Logical “1” Input Voltage
2.0
V
1, 2, 3
V
IL
Logical “0” Input Voltage
0.8
V
1, 2, 3
I
IH
Logical “1” Input Current
V
IH = VDD33
CLPIN
38
44
μA
1, 2, 3
SCLK, SDI
40
300
nA
SEN
21
28
μA
I
IL
Logical “0” Input Current
V
IL = VSS
CLPIN
-85
-300
nA
1, 2, 3
SCLK, SDI
-50
-300
nA
SEN
-60
-70
μA
CMOS Digital Output DC Specifications (SDO)
V
OH
Logical "1" Output Voltage
I
OUT = -0.5mA
1.93
1.8
V
1, 2, 3
V
OL
Logical "0" Output Voltage
I
OUT = 1.6mA
0.05
0.2
V
1, 2, 3
I
OH
Output Leakage Current
V
OUT = VDD
20
50
nA
1, 2, 3
I
OL
Output Leakage Current
V
OUT = VSS
-20
-50
nA
1, 2, 3
LVDS Clock Receiver DC Specifications (INCLK+ and INCLK- Pins)
V
IHL
Differential LVDS Clock
R
L = 100
100
250
mV
High Threshold Voltage
V
CM (LVDS Input Common
Mode Voltage) = 1.25V
1, 2, 3
V
ILL
Differential LVDS Clock
RL = 100
-100
mV
Low Threshold Voltage
V
CM (LVDS Input Common
Mode Voltage) = 1.25V
-250
1, 2, 3
LVDS Output DC Specifications
V
OD
Differential Output Voltage
LVDS Output Modes =
0000 x100
R
L = 100
275
210
410
mV
1, 2, 3
V
OS
LVDS Output Offset Voltage
1.19
1.05
1.3
V
1, 2, 3
V
OD
Differential Output Voltage
LVDS Output Modes =
0000 x101
R
L = 100
325
250
460
mV
1, 2, 3
V
OS
LVDS Output Offset Voltage
1.19
1.05
1.3
V
1, 2, 3
V
OD
Differential Output Voltage
LVDS Output Modes =
0000 x110
R
L = 100
377
300
535
mV
1, 2, 3
V
OS
LVDS Output Offset Voltage
1.1
.95
1.2
V
1, 2, 3
V
OD
Differential Output Voltage
LVDS Output Modes =
0000 x111
R
L = 100
425
350
590
mV
1, 2, 3
V
OS
LVDS Output Offset Voltage
1.1
0.95
1.2
V
1, 2, 3
I
OH
LVDS Output Leakage Current
4.25
5
μA
1, 2, 3
I
OL
LVDS Output Leakage Current
-4.29
-5
μA
1, 2, 3
I
OS
Output Short Circuit Current
V
OUT = 0V, RL = 100
40
50
mA
1, 2, 3
I
IHL
Diffferential LVDS Clock Input
Current
V
IH = VDD33
23
36
μA
1, 2, 3
I
ILL
Diffferential LVDS Clock Input
Current
V
IL = VSS
-34
-49
μA
1, 2, 3
9
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LM98640QML
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