參數(shù)資料
型號: GE28F640W30TD70
廠商: INTEL CORP
元件分類: PROM
英文描述: 4M X 16 FLASH 1.8V PROM, 70 ns, PBGA56
封裝: 0.75 MM PITCH, VFBGA-56
文件頁數(shù): 92/104頁
文件大?。?/td> 1443K
代理商: GE28F640W30TD70
28F640W30, 28F320W30, 28F128W30
June 2005
Intel Wireless Flash Memory (W30)
Datasheet
88
Order Number: 290702, Revision: 011
Note:
Available on the 130 nm lithography.
14.8
Clock Edge (RCR[6])
Configuring the valid clock edge enables a flexible memory interface to a wide range of burst
CPUs. Clock configuration sets the flash device to start a burst cycle, output data, and assert WAIT
on the rising or falling edge of the clock.
Table 30.
Sequence and Burst Length
Start
Addr.
(Dec)
Burst Addressing Sequence (Decimal)
4-Word Burst
CR[2:0]=001b
8-Word Burst
CR[2:0]=010b
16-Word Burst1
CR[2:0]=011b
Continuous Burst
CR[2:0]=111b
Linear
W
ra
p
(CR[3
]=
0
)
0
0-1-2-3
0-1-2-3-4-5-6-7
0-1-2...14-15
0-1-2-3-4-5-6-...
1
1-2-3-0
1-2-3-4-5-6-7-0
1-2-3...14-15-0
1-2-3-4-5-6-7-...
2
2-3-0-1
2-3-4-5-6-7-0-1
2-3-4...15-0-1
2-3-4-5-6-7-8-...
3
3-0-1-2
3-4-5-6-7-0-1-2
3-4-5...15-0-1-2
3-4-5-6-7-8-9-...
4
4-5-6-7-0-1-2-3
4-5-6...15-0-1-2-3
4-5-6-7-8-9-10...
5
5-6-7-0-1-2-3-4
5-6-7...15-0-1...4
5-6-7-8-9-10-11...
6
6-7-0-1-2-3-4-5
6-7-8...15-0-1...5
6-7-8-9-10-11-12-...
7
7-0-1-2-3-4-5-6
7-8-9...15-0-1...6
7-8-9-10-11-12-13...
..
.
..
.
..
.
..
.
..
.
14
14-15-0-1...13
14-15-16-17-18-19-20-...
15
15-0-1-2-3...14
15-16-17-18-19-...
No
-Wra
p
(CR
[3
]=
1
)
0
0-1-2-3
0-1-2-3-4-5-6-7
0-1-2...14-15
0-1-2-3-4-5-6-...
1
1-2-3-4
1-2-3-4-5-6-7-8
1-2-3...15-16
1-2-3-4-5-6-7-...
2
2-3-4-5
2-3-4-5-6-7-8-9
2-3-4...16-17
2-3-4-5-6-7-8-...
3
3-4-5-6
3-4-5-6-7-8-9-10
3-4-5...17-18
3-4-5-6-7-8-9-...
4
4-5-6-7-8-9-10-
11
4-5-6...18-19
4-5-6-7-8-9-10...
5
5-6-7-8-9-10-11-
12
5-6-7...19-20
5-6-7-8-9-10-11...
6
6-7-8-9-10-11-
12-13
6-7-8...20-21
6-7-8-9-10-11-12-...
7
7-8-9-10-11-12-
13-14
7-8-9...21-22
7-8-9-10-11-12-13...
...
14
14-15...28-29
14-15-16-17-18-19-20-...
15
15-16...29-30
15-16-17-18-19-20-21-...
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