參數(shù)資料
型號: GE28F640W30TD70
廠商: INTEL CORP
元件分類: PROM
英文描述: 4M X 16 FLASH 1.8V PROM, 70 ns, PBGA56
封裝: 0.75 MM PITCH, VFBGA-56
文件頁數(shù): 87/104頁
文件大?。?/td> 1443K
代理商: GE28F640W30TD70
28F640W30, 28F320W30, 28F128W30
Datasheet
Intel Wireless Flash Memory (W30)
June 2005
Order Number: 290702, Revision: 011
83
14.1
Read Mode (RCR[15])
All partitions support two high-performance read configurations:
synchronous burst mode
asynchronous page mode (default)
RCR[15] sets the read configuration to one of these modes.
Status register, query, and identifier modes support only asynchronous and single-synchronous read
operations.
14.2
First Access Latency Count (RCR[13:11])
The First Access Latency Count (RCR[13:11]) configuration tells the flash device how many
clocks must elapse from ADV# de-assertion (VIH) before driving the first data word onto its data
pins. The input clock frequency determines this value. See Table 27, “Read Configuration Register
Definitions” on page 81 for latency values.
Figure 38 shows data output latency from ADV# assertion for different latencies. Refer to Section
Note:
Other First Access Latency Configuration settings are reserved.
)
Figure 38.
First Access Latency Configuration
Code 5
Code 4
Code 3
Code 2
Valid
Address
Valid
Output
Valid
Output
Valid
Output
Valid
Output
Valid
Output
Valid
Output
Valid
Output
Valid
Output
Valid
Output
Valid
Output
Valid
Output
Valid
Output
Valid
Output
Valid
Output
Valid
Output
Valid
Output
Valid
Output
Valid
Output
Address [A]
ADV# [V]
CLK [C]
D[15:0] [Q]
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