參數(shù)資料
型號: GE28F640W30TD70
廠商: INTEL CORP
元件分類: PROM
英文描述: 4M X 16 FLASH 1.8V PROM, 70 ns, PBGA56
封裝: 0.75 MM PITCH, VFBGA-56
文件頁數(shù): 34/104頁
文件大?。?/td> 1443K
代理商: GE28F640W30TD70
28F640W30, 28F320W30, 28F128W30
Datasheet
Intel Wireless Flash Memory (W30)
June 2005
Order Number: 290702, Revision: 011
35
Notes:
1.
cycles during the initial access.
2.
WAIT (shown asserted; RCR[10]=0) can be configured to assert either during, or one data cycle before,
valid data.
3.
In this waveform, an x-word burst is initiated to the main array and it is terminated by a CE# de-assertion
after the first word in the burst. If this access had been done to Status, ID, or Query reads, the asserted
(low) WAIT signal would have remained asserted (low) as long as CE# is asserted (low).
Figure 11.
Single Synchronous Read-Array Operation Waveform
R12
R13
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