參數(shù)資料
型號: GE28F640W30TD70
廠商: INTEL CORP
元件分類: PROM
英文描述: 4M X 16 FLASH 1.8V PROM, 70 ns, PBGA56
封裝: 0.75 MM PITCH, VFBGA-56
文件頁數(shù): 85/104頁
文件大?。?/td> 1443K
代理商: GE28F640W30TD70
28F640W30, 28F320W30, 28F128W30
Datasheet
Intel Wireless Flash Memory (W30)
June 2005
Order Number: 290702, Revision: 011
81
14.0
Set Read Configuration Register
The Set Read Configuration Register (RCR) command sets the burst order, frequency
configuration, burst length, and other parameters.
A two-bus cycle command sequence initiates this operation. The read configuration register data is
placed on the lower 16 bits of the address bus (A[15:0]) during both bus cycles.
1. The Set Read Configuration Register command is written, along with the configuration data
(on the address bus).
2. A second write confirms the operation and again presents the read configuration register data
on the address bus.
3. The read configuration register data is latched on the rising edge of ADV#, CE#, or WE#
(whichever occurs first).
This command functions independently of the applied VPP voltage. After executing this command,
the flash device returns to read-array mode.
To examine the contents of the read configuration register, write the Read Identifier command and
then read location 05h. (See Table 27 and Table 28.)
Table 27.
Read Configuration Register Definitions
Read
Mode
Res’d
First Access Latency
Count
WAIT
Polarity
Data
Output
Config
WAIT
Confi
g
Burst
Seq
Clock
Confi
g
Res’
d
Res’
d
Burst
Wrap
Burst Length
RM
R
LC2
LC1
LC0
WP
DOC
WC
BS
CC
R
BW
BL2
BL1
BL0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
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