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參數(shù)資料
| 型號(hào)： | GE28F640W30TD70 |
| 廠商： | INTEL CORP |
| 元件分類： | PROM |
| 英文描述： | 4M X 16 FLASH 1.8V PROM, 70 ns, PBGA56 |
| 封裝： | 0.75 MM PITCH, VFBGA-56 |
| 文件頁數(shù)： | 63/104頁 |
| 文件大?。?/td> | 1443K |
| 代理商： | GE28F640W30TD70 |
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28F640W30, 28F320W30, 28F128W30
Datasheet
Intel Wireless Flash Memory (W30)
June 2005
Order Number: 290702, Revision: 011
61
11.0
Program Operations
11.1
Word Program
When the Word Program command is issued, the WSM executes a sequence of internally timed
events to program a word at the desired address, and to verify that the bits are sufficiently
programmed. Programming the flash memory array changes specifically addressed bits to 0; 1 bits
do not change the memory cell contents.
Programming can occur in only one partition at a time. All other partitions must be in either a read
mode or erase suspend mode. Only one partition can be in erase suspend mode at a time.
To examine the status register can be examined for program progress, read any address within the
partition that is busy programming. However, while most status register bits are partition-specific,
the Device WSM Status bit, SR[7], is device-specific. That is, if the status register is read from any
other partition, SR[7] indicates the program status of the entire flash memory device. This status bit
permits the system CPU to monitor the program progress while reading the status of other
partitions.
CE# or OE# toggle (during polling) updates the status register. Several commands can be issued to
a partition that is programming: Read Status Register, Program Suspend, Read Identifier, and Read
Query. The Read Array command can also be issued, but the read data is indeterminate.
After programming completes, three status register bits can signify various possible error
conditions:
SR[4] indicates a program failure if set.
If SR[3] is set, the WSM could not execute the Word Program command, because VPP was
outside the acceptable limits.
If SR[1] is set, the program was aborted, because the WSM attempted to program a locked
block.
After the status register data is examined, clear it using the Clear Status Register command before
issuing a new command. The partition remains in status register mode until another command is
written to that partition. Any command can be issued after the status register indicates program
completion.
If CE# is deasserted while the flash device is programming, the flash devices do not enter standby
mode until the program operation completes.
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