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參數(shù)資料
| 型號： | EDX5116ADSE |
| 廠商： | Elpida Memory, Inc. |
| 英文描述： | 512M bits XDR⑩ DRAM |
| 中文描述： | 512M比特的XDR DRAM的⑩ |
| 文件頁數(shù)： | 72/78頁 |
| 文件大?。?/td> | 3311K |
| 代理商： | EDX5116ADSE |
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Data Sheet E1033E30 (Ver. 3.0)
72
EDX5116ADSE
Package Description
Package Parasitic Summary
Table 18 summarizes inductance, capacitance, and resistance
values associated with each pin group for the memory compo-
nent. Most of the parameters have maximum values only, how-
ever some have both maximum and minimum values.
The first group of parameters are for the CFM/CFMN clock
pair pins. They include inductance, capacitance, and resistance
values. The second group of parameters are for the RQ request
pins. They include inductance, mutual inductance, capacitance,
and resistance values. There are also limits on the spread in
inductance and capacitance values allowed in any one memory
component. The third group of parameters are specific to the
DQ data pins and include inductance, mutual inductance,
capacitance, and resistance values. There are also limits on the
spread in inductance and capacitance values allowed in any one
memory component.The fourth group of parameters are for
the serial interface pins. They include inductance and capaci-
tance values.
Table 18
Package Parasitic Summary
(package parasitic values are measured on randomly-sampled devices)
Symbol
Parameter and Other Conditions
Minimum
Maximum
Units
L
VTERM
VTERM pin - effective input inductance per four bits
-
2.2
nH
L
I ,CFM
CFM/CFMN pins - effective input inductance
b
-
5.0
nH
C
I ,CFM
CFM/CFMN pins - effective input capacitance
b
1.8
2.4
pF
R
I ,CFM
CFM/CFMN pins - effective input resistance
4
18
Ω
L
I ,RQ
RSL RQ pins - effective input inductance
b
-
5.0
nH
C
I ,RQ
RSL RQ pins - effective input capacitance
b
1.8
2.4
pF
R
I ,RQ
RSL RQ pins - effective input resistance
4
18
Ω
L
12,RQ
Mutual inductance between adjacent RSL RQ signals
-
1.8
nH
Δ
L
I,RQ
Difference in L
I,RQ
between any RSL RQ pins of a single device
-
1.8
nH
Δ
C
I,RQ
Difference in C
I
between CFM/CFMN average and RSL RQ pins of single device
-0.12
+0.12
pF
Z
PKG,DQ
DRSL DQ pins - package differential impedance
note - package trace length should be less than 10mm long.
70
130
Ω
C
I ,DQ
DRSL DQ pins - effective input capacitance
a
-
1.8
pF
Δ
C
I,DQ
Difference in C
I
between DQi and DQNi of each DRSL pair
a
-
0.06
pF
R
I ,DQ
DRSL DQ pins - effective input resistance
4
40
Ω
L
I ,SI
Serial Interface effective input inductance
b
-
8.0
nH
C
I ,SI
Serial Interface effective input capacitance
b
(RST, SCK, CMD)
(SDI,SDO)
1.7
-
3.0
7.0
pF
pF
a. This is the effective die input capacitance, and does not include package capacitance.
b. CFM/RQ/SI should include package capacitance / Inductance, only DQ does not include package Capacitance. This value is a combination of the device IO circuitry and pack-
age capacitance & inductance.
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相關(guān)代理商/技術(shù)參數(shù) |
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| EDX5116ADSE-3A-E | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits XDR⑩ DRAM |
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