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參數(shù)資料
| 型號： | EDX5116ADSE |
| 廠商： | Elpida Memory, Inc. |
| 英文描述： | 512M bits XDR⑩ DRAM |
| 中文描述： | 512M比特的XDR DRAM的⑩ |
| 文件頁數(shù)： | 60/78頁 |
| 文件大?。?/td> | 3311K |
| 代理商： | EDX5116ADSE |
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Data Sheet E1033E30 (Ver. 3.0)
60
EDX5116ADSE
Operating Characteristics
Electrical Characteristics
Table 14 summarizes all electrical parameters (temperature,
current, and voltage) that characterize this memory compo-
nent. The only exception is the supply current values (I
DD
)
under different operating conditions covered in the
Supply Cur-
rent Profile
section.
The first section of parameters is concerned with the thermal
characteristics of the memory component.
The second section of parameters is concerned with the cur-
rent needed by the RQ pins and VREF pin.
The third section of parameters is concerned with the current
needed by the DQ pins and voltage levels produced by the DQ
pins when driving read data. This section is also concerned
with the current needed by the VTERM pin, and with the
resistance levels produced for the internal termination compo-
nents that attach to the DQ pins.
The fourth section of parameters determines the output volt-
age levels and the current needed for the serial interface signals.
t
CALCE
, t
CALZE
Delay between CALC/CALZ packet and CALE packet
12
-
t
CYCLE
Figure 35
t
CALE-CMD
Delay between CALE packet and packet with any command
24
-
t
CYCLE
Figure 35
t
CMD-PDN
Last command before PDN entry
16
-
t
CYCLE
Figure 36
t
PDN-CFM
RSL CFM/CFMN and VTERM stable after PDN entry
16
-
t
CYCLE
Figure 36
t
CFM-PDN
RSL CFM/CFMN and VTERM stable before PDN exit
16
-
t
CYCLE
Figure 36
t
PDN-CMD
First command after PDN exit (includes lock time for CFM/CFMN)
4096
-
t
CYCLE
Figure 36
Table 13
Timing Conditions (Continued)
Symbol
Parameter and Other Conditions
Minimum
Maximum
Units
Figure(s)
Table 14
Electrical Characteristics
Symbol
Parameter
Minimum
Maximum
Units
Θ
JC
Junction-to-case thermal resistance
a
-
0.5
°
C/Watt
I
I,RSL
RSL RQ or Serial Interface input current @ (V
IN
=
V
IH,RQ,MAX
)
-10
10
μ
A
I
REF,RSL
V
REF,RSL
current @ V
REF,RSL,MAX
flowing into VREF pin
-10
10
μ
A
V
OSW,DQ
DRSL DQ outputs - high-low swing:
V
OSW,DQ
= (V
OH,DQ
-V
OL,DQN
) or (V
OH,DQN
-V
OL,DQ
)
0.200
0.400
V
R
TERM,DQ
DRSL DQ outputs - termination resistance
40.0
60.0
Ω
V
OL,SI
RSL serial interface SDO output - low voltage
0.0
0.250
V
V
OH,SI
RSL serial interface SDO output - high voltage
V
TERM,RSL
- 0.250
V
TERM,RSL
V
a. The package is mounted on a thermal test board which is defined JEDEC Standard JESD 51-9.
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