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參數(shù)資料
| 型號： | DS3105LN+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 42/124頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC TIMING LINE CARD 64-LQFP |
| 產(chǎn)品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 160 |
| 類型： | 定時卡 IC，多路復用器 |
| PLL： | 是 |
| 主要目的： | 以太網(wǎng)，SONET/SDH，Stratum，電信 |
| 輸入： | CMOS，LVDS，LVPECL，TTL |
| 輸出： | CMOS，LVDS，LVPECL，TTL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 5:2 |
| 差分 - 輸入:輸出： | 無/是 |
| 頻率 - 最大： | 312.5MHz |
| 電源電壓： | 1.62 V ~ 1.98 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-LQFP |
| 供應商設備封裝： | 64-LQFP（10x10） |
| 包裝： | 托盤 |
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DS3105
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no input is forced) is listed as the second-highest priority (PTAB2:REF2) and the normal second-highest priority
input is listed as the third-highest priority (PTAB2:REF3).
When the T4 DPLL is used to measure the phase difference between the T0 DPLL selected reference and another
reference input by setting the T0CR1:T4MT0 bit, the T4FORCE field in the MCR4 register can be used to select the
other reference input.
7.6.4 Ultra-Fast Reference Switching
By default, disqualification of the selected reference and switchover to another reference occurs when the activity
monitor’s inactivity alarm threshold has been crossed, a process that takes on the order of hundreds of
milliseconds or seconds. For the T0 DPLL, an option for extremely fast disqualification and switchover is also
available. When ultra-fast switching is enabled (MCR10:UFSW = 1), if the fast activity monitor detects
approximately two missing clock cycles, it declares the reference failed by forcing the leaky bucket accumulator to
its upper threshold (see Section 7.5.2) and initiates reference switching. This is in addition to setting the SRFAIL bit
in MSR2 and optionally generating an interrupt request, as described in Section 7.5.3. When ultra-fast switching
occurs, the T0 DPLL transitions to the prelocked 2 state, which allows switching to occur faster by bypassing the
loss-of-lock state. The device should be in nonrevertive mode when ultra-fast switching is enabled. If the device is
in revertive mode, ultra-fast switching could cause excessive reference switching when the highest priority input is
intermittent.
7.6.5 External Reference Switching Mode
In this mode the SRCSW input pin controls reference switching between two clock inputs. This mode is enabled by
setting the EXTSW bit to 1 in the MCR10 register. In this mode, if the SRCSW pin is high, the T0 DPLL is forced to
lock to input IC3 (if the priority of IC3 is nonzero in IPR2) or IC5 (if the priority of IC3 is zero) whether or not the
selected input has a valid reference signal. If the SRCSW pin is low, the T0 DPLL is forced to lock to input IC4 (if
the priority of IC4 is nonzero in IPR2) or IC6 (if the priority of IC4 is zero) whether or not the selected input has a
valid reference signal. During reset the default value of the EXTSW bit is latched from the SRCSW pin. If external
reference switching mode is enabled during reset, the default frequency tolerance (DLIMIT registers) is configured
to
±80ppm rather than the normal default of ±9.2ppm.
In external reference switching mode the device is simply a clock switch, and the T0 DPLL is forced to lock onto the
selected reference whether or not it is valid. Unlike forced reference selection (Section 7.6.3) this mode controls the
PTAB1:SELREF field directly and is, therefore, not affected by the state of the MCR3:REVERT bit. During external
reference switching mode, only PTAB1:SELREF is affected; the REF1, REF2, and REF3 fields in the PTAB
registers continue to indicate the highest, second-highest, and third-highest priority valid inputs chosen by the
automatic selection logic. External reference switching mode only affects the T0 DPLL.
7.6.6 Output Clock Phase Continuity During Reference Switching
If phase build-out is enabled (PBOEN = 1 in MCR10) or the DPLL frequency limit (DLIMIT) is set to less than
±30ppm, the device always complies with the GR-1244-CORE requirement that the rate of phase change must be
less than 81ns per 1.326ms during reference switching.
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相關代理商/技術參數(shù) |
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| DS3105LN+ | 功能描述:計時器和支持產(chǎn)品 Line Card Timing IC RoHS:否 制造商:Micrel 類型:Standard 封裝 / 箱體:SOT-23 內部定時器數(shù)量:1 電源電壓-最大:18 V 電源電壓-最小:2.7 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Reel |
| DS3106 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Line Card Timing IC |
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