MOTOROLA
ColdFire2/2M User’s Manual
For More Information On This Product,
Go to: www.freescale.com
xxiii
LIST OF TABLES
Table
Number
Page
Number
Title
1-1
1-2
1-3
1-4
1-5
2-1
2-2
2-3
2-4
2-5
2-6
2-7
2-8
2-9
2-10
2-11
2-12
2-13
3-1
3-2
3-3
3-4
3-5
3-6
3-7
3-8
3-9
4-1
4-2
4-3
4-4
5-1
5-2
5-3
5-4
5-5
5-6
5-7
MOVEC Register Map.....................................................................................1-14
Integer Data Formats......................................................................................1-16
Effective Addressing Modes and Categories..................................................1-19
Notational Conventions...................................................................................1-19
Instruction Set Summary.................................................................................1-21
Signal Summary................................................................................................2-2
Master Arbiter Control Encoding.......................................................................2-4
Master Bus Transfer Size Encoding..................................................................2-5
Master Bus Transfer Modifier Encoding............................................................2-5
Master Bus Transfer Type Encoding.................................................................2-6
Interrupt Levels and Mask Values.....................................................................2-7
Cache Configuration Encoding .........................................................................2-8
Valid Tag RAM Data Signals.............................................................................2-8
Valid ROM Address Bits....................................................................................2-9
ROM Configuration Encoding .........................................................................2-10
Valid SRAM Address Bits................................................................................2-10
SRAM Configuration Encoding .......................................................................2-11
Processor Status Encoding.............................................................................2-12
Master Arbiter Control Encoding.......................................................................3-1
Master Bus Transfer Size Encoding..................................................................3-2
Master Bus Transfer Modifier Encoding............................................................3-3
Master Bus Transfer Type Encoding.................................................................3-4
MRDATA Requirements for Read Transfers.....................................................3-5
MWDATA Bus Requirements for Write Transfers.............................................3-6
Allowable Line Access Patterns......................................................................3-11
Memory Alignment Cycles ..............................................................................3-19
MTAB and MTEAB Assertion Results.............................................................3-27
Stack Pointer Alignment....................................................................................4-5
Exception Vector Assignments .........................................................................4-5
Exception Priority Groups .................................................................................4-6
Interrupt Levels and Mask Values...................................................................4-11
Cache Configuration Encoding .........................................................................5-3
Valid Tag RAM Data Signals.............................................................................5-3
Initial Fetch Offset and CLNF Bits.....................................................................5-5
Cache Line Fill Encoding ..................................................................................5-8
Valid ROM Address Bits..................................................................................5-11
ROM Configuration Encoding .........................................................................5-12
Valid ROM Base Address Bits ........................................................................5-13
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