參數(shù)資料
型號(hào)： AD9925BBCZ
廠商： ANALOG DEVICES INC
元件分類(lèi)： 消費(fèi)家電
英文描述： CCD Signal Processor with Vertical Driver and Precision Timing Generator
中文描述： SPECIALTY CONSUMER CIRCUIT, PBGA96
封裝： 8 X 8 MM, 0.65 MM PITCH, LEAD FREE, PLASTIC, CSBGA-96
文件頁(yè)數(shù)： 91/96頁(yè)
文件大小： 1447K
代理商： AD9925BBCZ
AD9925
Table 85. XV7 and XV8 Vertical Sequence 1 Registers
Address Data Bit Content Default Value Register Name
54
[0]
[11:1]
[23:12]
X
55
[11:0]
[23:12]
X
56
[0]
[23:1]
X
57
[23:0]
X
Rev. A | Page 91 of 96
Register Description
0: Vertical Masking Operation, 1: Hold Area instead of Vertical Masking
Unused
Start Position for XV7 and XV8
Number of Selected XV7, XV8 Repetitions for Odd Lines
Number of Selected XV7, XV8 Repetitions for Even Lines
0: No Hold Area for XV7 and XV8, 1: Enable Hold Area for XV7 and XV8
Unused
Unused
X
X
HOLD_1
UNUSED
XV78START_1
XV78REPO_1
XV78REPE_1
XV78HOLDEN_1
UNUSED
UNUSED
X
X
Table 86. XV7 and XV8 Vertical Sequence 2 Registers
Address Data Bit Content Default Value Register Name
58
[0]
[11:1]
[23:12]
X
59
[11:0]
[23:12]
X
5A
[0]
[23:1]
X
5B
[23:0]
X
Register Description
0: Vertical Masking Operation, 1: Hold Area instead of Vertical Masking
Unused
Start Position for XV7 and XV8
Number of Selected XV7, XV8 Repetitions for Odd Lines
Number of Selected XV7, XV8 Repetitions for Even Lines
0: No Hold Area for XV7 and XV8, 1: Enable Hold Area for XV7 and XV8
Unused
Unused
X
X
HOLD_2
UNUSED
XV78START_2
XV78REPO_2
XV78REPE_2
XV78HOLDEN_2
UNUSED
UNUSED
X
X
Table 87. XV7 and XV8 Vertical Sequence 3 Registers
Address Data Bit Content Default Value Register Name
5C
[0]
[11:1]
[23:12]
X
5D
[11:0]
[23:12]
X
5E
[0]
[23:1]
X
5F
[23:0]
X
Register Description
0: Vertical Masking Operation, 1: Hold Area instead of Vertical Masking
Unused
Start Position for XV7 and XV8
Number of Selected XV7, XV8 Repetitions for Odd Lines
Number of Selected XV7, XV8 Repetitions for Even Lines
0: No Hold Area for XV7 and XV8, 1: Enable Hold Area for XV7 and XV8
Unused
Unused
X
X
HOLD_3
UNUSED
XV78START_3
XV78REPO_3
XV78REPE_3
XV78HOLDEN_3
UNUSED
UNUSED
X
X
Table 88. XV7 and XV8 Vertical Sequence 4 Registers
Address Data Bit Content Default Value Register Name
60
[0]
[11:1]
[23:12]
X
61
[11:0]
[23:12]
X
62
[0]
[23:1]
X
63
[23:0]
X
Register Description
0: Vertical Masking Operation, 1: Hold Area instead of Vertical Masking
Unused
Start Position for XV7 and XV8
Number of Selected XV7, XV8 Repetitions for Odd Lines
Number of Selected XV7, XV8 Repetitions for Even Lines
0: No Hold Area for XV7 and XV8, 1: Enable Hold Area for XV7 and XV8
Unused
Unused
X
X
HOLD_4
UNUSED
XV78START_4
XV78REPO_4
XV78REPE_4
XV78HOLDEN_4
UNUSED
UNUSED
X
X
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