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參數(shù)資料
| 型號： | AD9925BBCZ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | CCD Signal Processor with Vertical Driver and Precision Timing Generator |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PBGA96 |
| 封裝： | 8 X 8 MM, 0.65 MM PITCH, LEAD FREE, PLASTIC, CSBGA-96 |
| 文件頁數(shù)： | 54/96頁 |
| 文件大小： | 1447K |
| 代理商： | AD9925BBCZ |
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AD9925
Rev. A | Page 54 of 96
VD
HD
SUSPEND
0
SYNC
H124, RG, V1 TO 4,
VSG, SUBCK
NOTES
1. SYNC RISING EDGE RESETS VD/HD AND COUNTERS TO ZERO.
2. SYNC POLARITY IS PROGRAMMABLE USING SYNCPOL REGIS
3. DURING SYNC LOW, ALL INTERNAL COUNTERS ARE RESE
4. IF SYNCSUSPEND = 1, VERTICAL CLOCKS, H1 TO H2, AND
5. IF SYNCSUSPEND = 0, CLOCK OUTPUTS CONTINUE TO OPERA
Figure 68. SYNC Timing to S
VD
TER (ADDR 0
T AND VD/HD CA
RG ARE HELD A
TE NORMAL
ynchronize AD9925 with External Timing
NOTE
INTERNAL H-COUNTER IS RESET 23 CLOCK EDGES AFTER THE HD FALLING EDGE.
x13).
N BE SUSPENDED USING THE SYNCSUSPEND REGISTER (ADDR 0x14).
T THEIR DEFAULT POLARITIES.
LY UNTIL SYNC RESET EDGE.
0
1
2
3
4
H-COUNTER
RESET
HD
CLI
X
X
X
X
X
X
X
X
X
H-COUNTER
(PIXEL COUNTER)
3ns MIN
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
Figure 69. External VD/HD and Internal H-Counter Synchronization, Slave Mode
0
1
2
3
4
H-COUNTER
RESET
VD
NOTE
TOGGLE POSITIONS CANNOT BE PROGRAMMED WITHIN 18 PIXELS OF PIXEL 0 LOCATION.
HD
H-COUNTER
(PIXEL COUNTER)
N
N-1
N-2
NO TOGGLE POSITIONS ALLOWED IN THIS AREA
N-3
N-4
N-5
N-6
N-7
N-8
N-9
N-10
N-11
N-12
N-13
N-14
N-15
N-16
N-17
N-18
N-19
N-20
N-21
N-22
0
Figure 70. Toggle Position Inhibit Area, Master Mode
0
1
2
3
4
H-COUNTER
RESET
VD
NOTE
HD
H-COUNTER
(PIXEL COUNTER)
N
N-1
N-2
NO TOGGLE POSITIONS ALLOWED IN THIS AREA
N-3
N-4
N-5
N-6
N-7
N-8
N-9
N-10
N-11
N-12
N-13
N-14
N-15
N-16
N-17
N-18
N-19
N-20
N-21
N-22
0
Figure 71. Toggle Position Inhibit Area, Slave Mode
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