參數(shù)資料
型號: AD9925BBCZ
廠商: ANALOG DEVICES INC
元件分類: 消費家電
英文描述: CCD Signal Processor with Vertical Driver and Precision Timing Generator
中文描述: SPECIALTY CONSUMER CIRCUIT, PBGA96
封裝: 8 X 8 MM, 0.65 MM PITCH, LEAD FREE, PLASTIC, CSBGA-96
文件頁數(shù): 26/96頁
文件大?。?/td> 1447K
代理商: AD9925BBCZ
AD9925
Hold Area Using FREEZE/RESUME Registers
The FREEZE/RESUME registers can also be used to create a
hold area, in which the XV outputs are temporarily held and
then later continued starting at the point where they were held
As shown in Figure 34 and Figure 35, this is different than the
VMASK, because the XV outputs continue from where they
stopped rather than continuing from where they would have
been. The ho
XV outputs, while the v-masking allows the counter to continue
d
Rev. A | Page 26 of 96
.
ld area temporarily stops the pixel counter for the
uring the masking area.
nd Fig
tical se
s (VSEQ
eration is controlled in the
gisters, described in the Vertical
ce re
tion.
XV7 and XV8 may or may not use the hold area, as shown in
Figure 34 a
ure 35. The hold op
Bank 3 ver
quen
Sequence
) sec
XV1
XV6
HD
1. WHEN HOLD = 1 FOR ANY V-SEQUENCE, THE FREEZE AND RESUME REGISTERS ARE USED TO SPECIFY THE HOLD AREA BOUNDRIES.
2. WHEN XV78HOLDEN = 0, XV7 AND XV8 DO NOT USE THE HOLD AR
EA, ONLY XV1–X
V6. H-COUNTER FOR XV1–XV6 WILL STOP DURING HOLD AREA.
NOTES
HOLD AREA
FOR XV1–XV6
XV7
XV8
NO HOLD
AREA FOR
XV7–XV8
FREEZE
RESUME
0
Figure 34. Vertical Hold Area Using the FREEZE/RESUME Registers
XV1
XV6
HD
NOTES
1. WHEN HOLD = 1 FOR ANY VERTICAL SEQUENCE, THE FREEZE AND RESUME REGISTERS ARE USED TO SPECIFY THE HOLD AREA BOUNDRIES.
2. WHEN XV78HOLDEN = 1, XV7 AND XV8 ALSO USE THE HOLD AREA. H-COUNTER FOR XV1 TO XV8 WILL STOP DURING HOLD AREA.
XV7
HOLD AREA
FOR XV1 TO XV8
XV8
FREEZE
RESUME
0
Figure 35. Apply Hold Area to XV7 and XV8
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