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參數(shù)資料
| 型號： | AD9925BBCZ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | CCD Signal Processor with Vertical Driver and Precision Timing Generator |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PBGA96 |
| 封裝： | 8 X 8 MM, 0.65 MM PITCH, LEAD FREE, PLASTIC, CSBGA-96 |
| 文件頁數(shù)： | 6/96頁 |
| 文件大?。?/td> | 1447K |
| 代理商： | AD9925BBCZ |
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AD9925
ANALOG SPECIFICATIONS
AVDD1 = 3.0 V, f
CLI
= 36 MHz, typical timing specifications, T
MIN
to T
MAX
, unless otherwise noted.
Table 4.
Parameter
Min
CDS
Allowable CCD Reset Transient
Maximum Input Range before Saturation
0 dB CDS Gain (Default Setting)
2 dB CDS Gain
4 dB CDS Gain
Maximum CCD Black Pixel Amplitude
VARIABLE GAIN AMPLIFIER (VGA)
Gain Control Resolution
Gain Monotonicity
Gain Range
Minimum Gain (VGA Code 0)
Maximum Gain (VGA Code 1023)
BLACK LEVEL CLAMP
Clamp Level Resolution
Clamp Level
Minimum Clamp Level (Code 0)
Maximum Clamp Level (Code 255)
ANALOG-TO-DIGITAL CONVERTER (ADC)
Resolution
12
Differential Nonlinearity (DNL)
–1.0
No Missing Codes
Full-Scale Input Voltage
VOLTAGE REFERENCE
Reference Top Voltage (REFT)
Reference Bottom Voltage (REFB)
SYSTEM PERFORMANCE
Gain Accuracy
Low Gain (VGA Code 0)
5.0
Maximum Gain (VGA Code 1023)
40.5
Peak Nonlinearity, 500 mV Input Signal
Total Output Noise
Rev. A | Page 6 of 96
Typ
500
1.0
1.25
1.6
+200/–100
1024
Guaranteed
6
42
256
0
255
±0.5
Guaranteed
2.0
2.0
1.0
5.5
41.5
0.1
0.8
Max
+1.0
6.0
42.5
Unit
mV
V p-p
V p-p
V p-p
mV
Steps
dB
dB
Steps
LSB
LSB
Bits
LSB
V
V
V
dB
dB
%
LSB rms
Test Conditions/Comments
Input Characteristics Definition.
1
Positive Offset Definition
1
Measured at ADC Output.
Includes Entire Signal Chain.
Gain = (0.0351 × Code) + 5.5 dB.
12 dB Gain Applied.
AC Grounded Input, 6 dB Gain Ap-
plied.
Measured with Step Change on
Supply.
Power Supply Rejection (PSR)
50
dB
1
Input signal characteristics are defined as
+200mV MAX
OPTICAL BLACK PIXEL
500mV TYP
RESET TRANSIENT
1V MAX
INPUT SIGNAL RANGE
(0dB CDS GAIN)
0
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