參數(shù)資料
型號(hào)： AD9925BBCZ
廠商： ANALOG DEVICES INC
元件分類： 消費(fèi)家電
英文描述： CCD Signal Processor with Vertical Driver and Precision Timing Generator
中文描述： SPECIALTY CONSUMER CIRCUIT, PBGA96
封裝： 8 X 8 MM, 0.65 MM PITCH, LEAD FREE, PLASTIC, CSBGA-96
文件頁數(shù)： 77/96頁
文件大?。?/td> 1447K
代理商： AD9925BBCZ
AD9925
Table 60. Vertical Sequence 2 (VSEQ2) Register Map
Address Data Bit Content Default Value
90
[1:0]
[2]
[3]
[7:4]
[9:8]
[1
[12]
[23:12
]
91
[23:12]
92
[23:12]
93
[23:12]
94
[23:12]
95
[11:0]
[23:12]
96
[11:0]
[23:12]
97
[11:0]
[23:12]
Rev. A | Page 77 of 96
R
H
C
PB
V
V
HBLKALT_2
H
U
NUSED
V
V
PATREPE_2
V
H
DLEN_2
PBLKTOG1_2
PBLKTOG2_2
HBLKTOG1_2
HBLKTOG2_2
HBLKTOG3_2
HBLKTOG4_2
HBLKTOG5_2
HBLKTOG6_2
CLPOBTOG1_2
CLPOBTOG2_2
egister Name
BLKMASK_2
LPOBPOL_2
LKPOL_2
PATSEL_2
MASK_2
R gister Description
Ma
CL
PB
Se
En
Enable HBLK Alternation .
13
Un
used.
Number of Selected Vertical Pattern Group Repetitions for Odd Lines.
Nu
mber of Selected Vertical Pattern Group Repetitions for Even Lines.
Sta
HD
Line Length (Number of Pixels) for Vertical Sequence 2.
PB
PBLK Toggle Position 2 for Vertical Sequence 2.
HBLK Toggle Position 1 for Vertical Sequence 2.
HBLK Toggle Position 2 for Vertical Sequence 2.
HBLK Toggle Position 3 for Vertical Sequence 2.
HBLK Toggle Position 4 for Vertical Sequence 2.
HBLK Toggle Position 5 for Vertical Sequence 2.
HBLK Toggle Position 6 for Vertical Sequence 2.
CLPOB Toggle Position 1 for Vertical Sequence 2.
CLPOB Toggle Position 2 for Vertical Sequence 2.
1:10]
.
r Allows HD Length up to 8191 Pixels.
X
X
X
X
X
X
X
DLEN13_2
sking Polarity during HBLK. H1 [0], H3 [1].
POB Start Polarity.
LK Start Polarity.
lected Vertical Pattern Group for Vertical Sequence 2.
able Masking of Vertical Outputs (Specified by FREEZE/RESUME Registers)
th
Bit for HD Length Counte
X
X
X
X
X
X
X
[11:0]
PATREPO_2
[11:0]
PATSTART_2
rt Position in the Line for the Selected Vertical Pattern Group.
[11:0]
LK Toggle Position 1 for Vertical Sequence 2.
X
X
X
X
X
X
X
[11:0]
T
Address Data Bit Content Default Value Registe
98
[1:0]
[2]
[3]
[7:4]
[9:8]
[11:10
[1
[23:12]
99
[11:0]
[23:12]
9A
[11:0]
[23:12]
9B
[23:12]
9C
[11:0]
[23:12]
9D
[11:0]
[23:12]
9E
[11:0]
[23:12]
9F
[11:0]
[23:12]
able 61. Vertical Sequence 3 (VSEQ3) Register Map
r Name
Register Description
Masking Polarity during HB
POB Start Polarity.
LK Start Polarity.
]
2]
H
C
PB
V
V
H
HDLEN13_3
U
NUSED
V
V
PATREPE_3
V
HDLEN_3
PB
PBLKTOG2_3
H
HBLKTOG2_3
HBLKTOG3_3
HBLKTOG4_3
HBLKTOG5_3
HBLKTOG6_3
CLPOBTOG1_3
CLPOBTOG2_3
LK. H1 [0], H3 [1].
CL
PB
Selected Vertical Pattern Group for Vertical Sequence 3.
En
En
13
Length Counter Allows HD Length up to 8191 Pixels.
Un
used.
Nu
Number of Selected Vertical Pattern Group Repetitions for Even Lines.
Sta
HD Line Length (Number of Pixels) for Vertical Sequence 3.
PB
PBLK Toggle Position 2 for Vertical Sequence 3.
HB
HB
LK Toggle Position 2 for Vertical Sequence 3.
HBLK Toggle Position 3 for Vertical Sequence 3.
HBLK Toggle Position 4 for Vertical Sequence 3.
HBLK Toggle Position 5 for Vertical Sequence 3.
HBLK Toggle Position 6 for Vertical Sequence 3.
CLPOB Toggle Position 1 for Vertical Sequence 3.
CLPOB Toggle Position 2 for Vertical Sequence 3.
Registers).
X
X
X
X
X
X
X
BLKMASK_3
LPOBPOL_3
LKPOL_3
PATSEL_3
MASK_3
BLKALT_3
able Masking of Vertical Outputs (Specified by FREEZE/RESUME
able HBLK Alternation
th
Bit for HD
X
X
X
X
X
PATREPO_3
mber of Selected Vertical Pattern Group Repetitions for Odd Lines.
PATSTART_3
rt Position in the Line for the Selected Vertical Pattern Group.
X
X
X
X
X
X
X
X
X
[11:0]
LKTOG1_3
LK Toggle Position 1 for Vertical Sequence 3.
BLKTOG1_3
LK Toggle Position 1 for Vertical Sequence 3.
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