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CHAPTER 5 CPU ARCHITECTURE
User
’
s Manual U14260EJ3V1UD
5.2.3 Special function registers (SFR)
Unlike a general-purpose register, each special function register has a special function.
They are allocated in the area FF00H to FFFFH.
The special function registers can be manipulated like the general-purpose registers, with operation, transfer and
bit manipulation instructions. The manipulatable bit units, 1, 8, and 16, depend on the special function register type.
Each manipulation bit unit can be specified as follows.
1-bit manipulation
Describe the symbol reserved by assembler for the 1-bit manipulation instruction operand (sfr.bit).
This manipulation can also be specified with an address.
8-bit manipulation
Describe the symbol reserved by assembler for the 8-bit manipulation instruction operand (sfr).
This manipulation can also be specified with an address.
16-bit manipulation
Describe the symbol reserved by assembler for the 16-bit manipulation instruction operand (sfrp).
When addressing an address, describe an even address.
Table 5-3 gives a list of the special function registers. The meanings of items in the table are as follows.
Symbol
Symbol indicating the address of a special function register. It is a reserved word in the RA78K0, and is defined
as an sfr variable using the #pragma sfr directive in the CC78K0. When using the RA78K0, ID78K0-NS, ID78K0,
or SM78K0, symbols can be written as an instruction operand.
R/W
Indicates whether the corresponding special function register can be read or written.
R/W: Read/write
R:
Read only
W:
Write only
Manipulatable bit units
Indicates the manipulatable bit unit (1, 8, or 16).
“–”
indicates a bit unit for which manipulation is not possible.
After reset
Indicates each register status upon RESET input.