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CHAPTER 8 16-BIT TIMER/EVENT COUNTERS 00, 01
User
’
s Manual U14260EJ3V1UD
8.4 Operation of 16-Bit Timer/Event Counters 00, 01
8.4.1 Interval timer operation
Setting 16-bit timer mode control register 0n (TMC0n) and capture/compare control register 0n (CRC0n) as shown
in Figure 8-15 allows operation as an interval timer.
Setting
The basic operation setting procedure is as follows.
<1> Set the CRC0n register (see
Figure 8-15
for the set value).
<2> Set any value to the CR00n register.
<3> Set the count clock by using the PRM0n register.
<4> Set the TMC0n register to start the operation (see
Figure 8-15
for the set value).
Remark
For how to enable the INTTM00n interrupt, see
CHAPTER 19 INTERRUPT FUNCTIONS
.
Interrupt requests are generated repeatedly using the count value set in 16-bit timer capture/compare register 00n
(CR00n) beforehand as the interval.
When the count value of 16-bit timer counter 0n (TM0n) matches the value set to CR00n, counting continues with
the TM0n value cleared to 0 and the interrupt request signal (INTTM00n) is generated.
The count clock of the 16-bit timer/event counter can be selected using bits 0 and 1 (PRM00n, PRM01n) of prescaler
mode register 0n (PRM0n).
Figure 8-15. Control Register Settings for Interval Timer Operation
(a) 16-bit timer mode control register 0n (TMC0n)
(b) Capture/compare control register 0n (CRC0n)
(c) Prescaler mode register 0n (PRM0n)
Remark
0/1: Setting 0 or 1 allows another function to be used simultaneously with the interval timer. See the
description of the respective control registers for details.
n = 0, 1
7
0
6
0
5
0
4
0
TMC0n3
1
TMC0n2
1
1
0
OVFn0
0
TMC0n
Clears and starts on match between TM0n and CR00n.
7
0
6
0
5
0
4
0
3
0
CRC02n
0/1
CRC01n
0/1
CRC00n
0
CRC0n
CR00n used as compare register
ES11n
0/1
ES10n
0/1
ES01n
0/1
ES00n
0/1
3
0
2
0
PRM01n
0/1
PRM00n
0/1
PRM0n
Selects count clock.
Setting invalid (setting
“
10
”
is prohibited.)
Setting invalid (setting
“
10
”
is prohibited.)