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529
CHAPTER 27 ELECTRICAL SPECIFICATIONS (CONVENTIONAL PRODUCTS)
User
’
s Manual U14260EJ3V1UD
Main System Clock Oscillator Characteristics (T
A
= –40 to +85
°
C, V
DD
= 1.8 to 5.5 V)
Notes 1.
Indicates only oscillator characteristics. Refer to
AC Characteristics
for instruction execution time.
2.
Time required to stabilize oscillation after reset or STOP mode release.
Cautions
1. When using the main system clock oscillator, wire as follows in the area enclosed by the broken
lines in the above figures to avoid an adverse effect from wiring capacitance.
Keep the wiring length as short as possible.
Do not cross the wiring with the other signal lines.
Do not route the wiring near a signal line through which a high fluctuating current flows.
Always make the ground point of the oscillator capacitor the same potential as V
SS1
.
Do not ground the capacitor to a ground pattern through which a high current flows.
Do not fetch signals from the oscillator.
2. When the main system clock is stopped and the system is operating on the subsystem clock,
wait until the oscillation stabilization time has been secured by the program before switching
back to the main system clock.
Resonator
Recommended
Circuit
Parameter
Conditions
MIN.
TYP.
MAX.
Unit
Ceramic
Oscillation
4.0 V
≤
V
DD
≤
5.5 V
1.0
8.38
MHz
resonator
frequency (f
X
)
Note 1
1.8 V
≤
V
DD
<
4.0 V
1.0
5.0
Oscillation
After V
DD
reaches
4
ms
stabilization time
Note 2
oscillation voltage range
MIN.
Crystal
Oscillation
4.0 V
≤
V
DD
≤
5.5 V
1.0
8.38
MHz
resonator
frequency (f
X
)
Note 1
1.8 V
≤
V
DD
<
4.0 V
1.0
5.0
Oscillation
4.0 V
≤
V
DD
≤
5.5 V
10
ms
1.8 V
≤
V
DD
<
4.0 V
30
stabilization time
Note 2
External
X1 input
4.0 V
≤
V
DD
≤
5.5 V
1.0
8.38
MHz
clock
frequency (f
X
)
Note 1
1.8 V
≤
V
DD
<
4.0 V
1.0
5.0
X1 input
4.0 V
≤
V
DD
≤
5.5 V
50
500
ns
high-/low-level width
(t
XH
, t
XL
)
1.8 V
≤
V
DD
<
4.0 V
85
500
X2
X1
C2
Rd
C1
X1
V
SS1
X2
C2
Rd
C1
X1
V
SS1
X2