
CHAPTER 15 SERIAL INTERFACE UART2
275
User
’
s Manual U14260EJ3V1UD
(3) Asynchronous serial interface transmit status register 2 (ASIF2)
This register indicates the status of transmission.
ASIF2 is set by an 8-bit memory manipulation instruction.
RESET input clears ASIF2 to 00H.
Figure 15-5. Format of Asynchronous Serial Interface Transmit Status Register 2 (ASIF2)
Address: FF95H After reset: 00H R
Symbol
7
6
5
4
3
2
1
0
ASIF2
0
0
0
0
0
0
TXBF
TXSF
TXBF
Transmit buffer data flag
0
If bit 7 (POWER2) or bit 6 (TXE2) of asynchronous serial interface mode register 2
(ASIM2) is cleared to 0
If data is transferred to transmit shift register 2 (TXS2)
1
If data is written to transmit buffer register 2 (TXB2) (if data exists in TXB2)
TXSF
Transmit shift register data flag
0
If bit 7 (POWER2) or bit 6 (TXE2) of asynchronous serial interface mode register 2
(ASIM2) is cleared to 0
If no more data is transferred from transmit buffer register 2 (TXB2) after completion
of transfer.
1
If data is transferred from transmit buffer register 2 (TXB2) (during transmission)
Cautions 1. To start successive transmission, be sure to check that TXBF is 0 after the first byte of data
has been written to transmit buffer register 2 (TXB2), then write the second byte of data to
TXB2.
2. When successive transmission is in progress, the processing of writing to TXB2 can be
confirmed by checking the value of TXSF after the transmit completion interrupt.
TXSF = 1: Successive transmission in progress. One-byte data can be written.
TXSF = 0: Successive transmission is complete. Two-byte data can be written.
When writing, note Caution 1 above.
3. To initialize (to set TXE2 to 0 or POWER2 to 0) during successive transmission, make sure
that TXSF is 0 after the transmit completion interrupt, then initialize.