![](http://datasheet.mmic.net.cn/370000/UPD780076_datasheet_16740795/UPD780076_586.png)
586
User’s Manual U14260EJ3V1UD
APPENDIX E REVISION HISTORY
E.1 Major Revisions in This Edition
(1/3)
Page
Description
U14260EJ3V0UD00
→
U14260EJ3V1UD00
p. 360
Modification of
Figure 18-18 Communication Reservation Timing
p. 366
Modification of
Figure 18-21 Master Operation Flowchart (5/5)
pp. 443, 444
Division of Note in previous edition of
Figure 23-5 Example of Connection with Dedicated Flash
Programmer
to
Notes 1
and
2
and modification of contents
p. 447
Addition of description on voltage monitoring of dedicated flash programmer to
<Power supply>
in
23.3.3 On-board pin processing
U14260EJ2V0UD00
→
U14260EJ3V0UD00
Throughout
Addition of expanded-specification products to
μ
PD780078Y Subseries
Modification of name of the following special function registers (SFR)
Ports 0 to 8
→
Port registers 0 to 8
p. 29
Addition of
2.1 Expanded-Specification Products and Conventional Products
p. 78
Modification of value after reset of port register 1 (P1) in
Table 5-3 Special Function Register List
p. 110
Modification of
Figure 6-14 Block Diagram of P40 to P47
p. 112
Modification of
Figure 6-16 Block Diagram of P50 to P57
p. 113
Modification of
Figure 6-17 Block Diagram of P64, P65, and P67
p. 114
Modification of
Figure 6-18 Block Diagram of P66
p. 118
Addition of port registers (P0 to P8) to
6.3 Port Function Control Registers
Addition of the following figures
Figure 8-3 Format of 16-Bit Timer Counter 0n (TM0n)
Figure 8-4 Format of 16-Bit Timer Capture/Compare Register 00n (CR00n)
Figure 8-5 Format of 16-Bit Timer Capture/Compare Register 01n (CR01n)
p. 145
p. 145
p. 147
Addition of register setting method to the following sections
8.4.1 Interval timer operation
8.4.2 External event counter operation
8.4.3 Pulse width measurement operations
8.4.4 Square-wave output operation
8.4.5 PPG output operation
p. 158
p. 161
p. 163
p. 171
p. 173
Addition of settings of prescaler mode register 0n (PRM0n) to the following figures
Figure 8-15 Control Register Settings for Interval Timer Operation
Figure 8-19 Control Register Settings in External Event Counter Mode (with Rising Edge
Specified)
Figure 8-23 Control Register Settings for Pulse Width Measurement with Free-Running Counter
and One Capture Register (When TI00n and CR01n Are Used)
Figure 8-26 Control Register Settings for Measurement of Two Pulse Widths with Free-Running
Counter
Figure 8-28 Control Register Settings for Pulse Width Measurement with Free-Running Counter
and Two Capture Registers (with Rising Edge Specified)
Figure 8-30 Control Register Settings for Pulse Width Measurement by Means of Restart (with
Rising Edge Specified)
Figure 8-32 Control Register Settings in Square-Wave Output Mode
Figure 8-34 Control Register Settings for PPG Output Operation
p. 158
p. 161
p. 164
p. 166
p. 168
p. 170
p. 172
p. 174