- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄382641 > TMS320SP5410AZGU12 (Texas Instruments, Inc.) Fixed-Point Digital Signal Processor PDF資料下載
參數(shù)資料
| 型號(hào)： | TMS320SP5410AZGU12 |
| 廠商： | Texas Instruments, Inc. |
| 元件分類(lèi)： | 數(shù)字信號(hào)處理 |
| 英文描述： | Fixed-Point Digital Signal Processor |
| 中文描述： | 定點(diǎn)數(shù)字信號(hào)處理器 |
| 文件頁(yè)數(shù)： | 24/100頁(yè) |
| 文件大?。?/td> | 913K |
| 代理商： | TMS320SP5410AZGU12 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)當(dāng)前第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)
www.ti.com
3.2.2
Programmable Bank-Switching
TMS320VC5410A
Fixed-Point Digital Signal Processor
SPRS139G–NOVEMBER 2000–REVISED JANUARY 2005
The software wait-state multiplier bit of the software wait-state control register (SWCR) is used to extend
the base number of wait states selected by the SWWSR. The SWCR bit fields are shown in Figure 3-6
and described in Table 3-4.
15
8
Reserved
R/W-0
7
1
0
Reserved
SWSM
R/W-0
R/W-0
LEGEND: R = Read, W = Write, n = value at reset
Figure 3-6. Software Wait-State Control Register (SWCR) [MMR Address 002Bh]
Table 3-4. Software Wait-State Control Register (SWCR) Field Descriptions
BIT
15-1
FIELD
VALUE
0
FUNCTION
Reserved
These bits are reserved and are unaffected by writes.
Software wait-state multiplier. Used to multiply the number of wait states defined in the SWWSR by a
factor of 1 or 2.
Wait-state base values are unchanged (multiplied by 1).
Wait-state base values are multiplied by 2 for a maximum of 14 wait states.
0
SWSM
0
1
Programmable bank-switching logic allows the 5410A to switch between external memory banks without
requiring external wait states for memories that need additional time to turn off. The bank-switching logic
automatically inserts one cycle when accesses cross a 32K-word memory-bank boundary inside program
or data space.
Bank-switching is defined by the bank-switching control register (BSCR), which is memory-mapped
ataddress 0029h. The bit fields of the BSCR are shown in Figure 3-7 and are described in Table 3-5.
15
14
13
12
11
8
CONSEC
DIVFCT
IACKOFF
Reserved
R/W-1
R/W-11
R/W-1
R
7
3
2
1
0
Reserved
HBH
BH
Reserved
R
R/W-0
R/W-0
R
LEGEND: R = Read, W = Write, n = value at reset
Figure 3-7. Bank-Switching Control Register (BSCR) [MMR Address 0029h]
24
Functional Overview
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TMS32C6411ZLZA6E3 | FIXED-POINT DIGITAL SIGNAL PROCESSORS |
| TMS32C6416EGLSA6E3 | FIXED-POINT DIGITAL SIGNAL PROCESSORS |
| TMS32C6415CGLSA6E3 | FIXED-POINT DIGITAL SIGNAL PROCESSORS |
| TMS32C6411GLSA6E3 | FIXED-POINT DIGITAL SIGNAL PROCESSORS |
| TMS32C6415EGLSA6E3 | FIXED-POINT DIGITAL SIGNAL PROCESSORS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TMS320SP6713GDP225 | 制造商:Texas Instruments 功能描述:5410PGE-100 100 MIPS 144TQFP REV 2.0 - Trays |
| TMS320SPVC5470GHK | 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC Quad Bus Buffer Gate With 3-State Outputs RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| TMS320SS16FNL | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| TMS320SS16NL | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| TMS320TCI100BGLZ7 | 制造商:Texas Instruments 功能描述: |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。