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參數(shù)資料
| 型號： | TMS320SP5410AZGU12 |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | Fixed-Point Digital Signal Processor |
| 中文描述： | 定點數(shù)字信號處理器 |
| 文件頁數(shù)： | 18/100頁 |
| 文件大?。?/td> | 913K |
| 代理商： | TMS320SP5410AZGU12 |
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3.1.2
Program Memory
3.1.3
Extended Program Memory
3.1.4
On-Chip ROM With Bootloader
TMS320VC5410A
Fixed-Point Digital Signal Processor
SPRS139G–NOVEMBER 2000–REVISED JANUARY 2005
Software can configure their memory cells to reside inside or outside of the program address map. When
the cells are mapped into program space, the device automatically accesses them when their addresses
are within bounds. When the program-address generation (PAGEN) logic generates an address outside its
bounds, the device automatically generates an external access. The advantages of operating from on-chip
memory are as follows:
Higher performance because no wait states are required
Lower cost than external memory
Lower power than external memory
The advantage of operating from off-chip memory is the ability to access a larger address space.
The 5410A uses a paged extended memory scheme in program space to allow access of up to 8192K of
program memory. In order to implement this scheme, the 5410A includes several features which are also
present on C548/549/5410:
Twenty-three address lines, instead of sixteen
An extra memory-mapped register, the XPC
Six extra instructions for addressing extended program space
Program memory in the 5410A is organized into 128 pages that are each 64K in length.
The value of the XPC register defines the page selection. This register is memory-mapped into data space
to address 001Eh. At a hardware reset, the XPC is initialized to 0.
The 5410A features a 16K-word
×
16-bit on-chip maskable ROM that can only be mapped into program
memory space.
Customers can arrange to have the ROM of the 5410A programmed with contents unique to any particular
application.
A bootloader is available in the standard 5410A on-chip ROM. This bootloader can be used to
automatically transfer user code from an external source to anywhere in the program memory at power
up. If MP/MC of the device is sampled low during a hardware reset, execution begins at location FF80h of
the on-chip ROM. This location contains a branch instruction to the start of the bootloader program.
The standard 5410A devices provide different ways to download the code to accommodate various
system requirements:
Parallel from 8-bit or 16-bit-wide EPROM
Parallel from I/O space, 8-bit or 16-bit mode
Serial boot from serial ports, 8-bit or 16-bit mode
Host-port interface boot
Serial EEPROM mode
Warm boot
18
Functional Overview
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