參數(shù)資料
型號: S1D13706
廠商: 愛普生(中國)有限公司
英文描述: S1D13706 Embedded Memory LCD Controller
中文描述: S1D13706 LCD控制器的嵌入式存儲器
文件頁數(shù): 123/152頁
文件大?。?/td> 1784K
代理商: S1D13706
Epson Research and Development
Vancouver Design Center
Page 123
Hardware Functional Specification
Issue Date: 2004/02/09
S1D13706
X31B-A-001-09
Note
For information on GPIO pin mapping when HR-TFT/D-TFD panels are selected, see
Table 4-9: “LCD Interface Pin Mapping,” on page 30.
bit 6
GPIO6 Pin IO Status
When a D-TFD panel is not selected (REG[10h] bits 1:0) and GPIO6 is configured as an
output, writing a 1 to this bit drives GPIO6 high and writing a 0 to this bit drives GPIO6
low.
When a D-TFD panel is not selected (REG[10h] bits 1:0) and GPIO6 is configured as an
input, a read from this bit returns the status of GPIO6.
When a D-TFD panel is enabled (REG[10h] bits 1:0 = 11), GPIO6 outputs the YSCLD
signal automatically and writing to this bit has no effect.
bit 5
GPIO5 Pin IO Status
When a D-TFD panel is not selected (REG[10h] bits 1:0) and GPIO5 is configured as an
output, writing a 1 to this bit drives GPIO5 high and writing a 0 to this bit drives GPIO5
low.
When a D-TFD panel is not selected (REG[10h] bits 1:0) and GPIO5 is configured as an
input, a read from this bit returns the status of GPIO5.
When a D-TFD panel is enabled (REG[10h] bits 1:0 = 11) and a 1 is written to this bit, the
D-TFD signal DD_P1 signal is enabled.
When a D-TFD panel is enabled (REG[10h] bits 1:0 = 11) and a 0 is written to this bit, the
D-TFD signal DD_P1 signal is forced low.
bit 4
GPIO4 Pin IO Status
When a D-TFD panel is not selected (REG[10h] bits 1:0) and GPIO4 is configured as an
output, writing a 1 to this bit drives GPIO4 high and writing a 0 to this bit drives GPIO4
low.
When a D-TFD panel is not selected (REG[10h] bits 1:0) and GPIO4 is configured as an
input, a read from this bit returns the status of GPIO4.
When a D-TFD panel is enabled (REG[10h] bits 1:0 = 11), GPIO4 outputs the RES signal
automatically and writing to this bit has no effect.
General Purpose IO Pins Status/Control Register 0
REG[ACh]
Read/Write
n/a
GPIO6 Pin IO
Status
GPIO5 Pin IO
Status
GPIO4 Pin IO
Status
GPIO3 Pin IO
Status
GPIO2 Pin IO
Status
GPIO1 Pin IO
Status
GPIO0 Pin IO
Status
7
6
5
4
3
2
1
0
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