參數資料
型號: S1D13706
廠商: 愛普生(中國)有限公司
英文描述: S1D13706 Embedded Memory LCD Controller
中文描述: S1D13706 LCD控制器的嵌入式存儲器
文件頁數: 104/152頁
文件大?。?/td> 1784K
代理商: S1D13706
Page 104
Epson Research and Development
Vancouver Design Center
S1D13706
X31B-A-001-09
Hardware Functional Specification
Issue Date: 2004/02/09
bits 9-0
Horizontal Display Period Start Position Bits [9:0]
These bits specify a value used in the calculation of the Horizontal Display Period Start
Position (in 1 pixel resolution) for TFT, HR-TFT and D-TFD panels.
For passive LCD panels these bits must be set to 00h which will result in HDPS = 22.
HDPS = (REG[17h] bits 1-0, REG[16h] bits 7-0) + 22
For TFT/HR-TFT/D-TFD panels, HDPS is calculated using the following formula.
HDPS = (REG[17h] bits 1-0, REG[16h] bits 7-0) + 5
For further information on calculating the HDPS, see the specific panel AC Timing in
Section 6.4, “Display Interface” on page 56.
Note
This register must be programmed such that the following formula is valid.
HDPS + HDP < HT
Horizontal Display Period Start Position Register 0
REG[16h]
Read/Write
Horizontal Display Period Start Position Bits 7-0
7
6
5
4
3
2
1
0
Horizontal Display Period Start Position Register 1
REG[17h]
Read/Write
n/a
Horizontal Display Period
Start Position Bits 9-8
7
6
5
4
3
2
1
0
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相關代理商/技術參數
參數描述
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