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參數(shù)資料
| 型號(hào)： | S1C6N3B0D0A0100 |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | MICROCONTROLLER, UUC54 |
| 封裝： | DIE-54 |
| 文件頁(yè)數(shù)： | 63/79頁(yè) |
| 文件大?。?/td> | 606K |
| 代理商： | S1C6N3B0D0A0100 |
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58
EPSON
S1C6N3B0 TECHNICAL MANUAL
CHAPTER 5: BASIC EXTERNAL WIRING DIAGRAM
(1) Piezo Buzzer Single Terminal Driving
(when "Buzzer OFF level = High" and "LCD internal voltage regurator" are selected)
C1
C2
CGX
X'tal
1.5 V (S1C6N3B0)
3.0 V (S1C6A3B0)
Piezo
Buzzer
R01
K00
K03
P00
P03
R00
R02
R03
I
I/O
O
SEG0
SEG19
(SEG25)
COM0
COM3
LCD PANEL
S1C6N3B0
S1C6A3B0
Coil
CA
CB
VDD
VD1
VC1
VC2
VC3
OSC1
OSC2
RESET
VSS
TEST
Cp
1
1 Crystal oscillation (S1C6N3B0)
2 CR oscillation (S1C6N3B0/62A3B)
3 Ceramic oscillation (S1C6A3B0)
4 Capacitors (C3–C5) are connected.
Connection depending on power supply
and LCD panel specification. Please refer
to pages 5 and 30.
2
CGC
CDC
RCR
CR
3
X'tal
CGX
RCR
CR
CGC
CDC
C1–C5
Cp
Crystal oscilator
Trimmer capacitor
Resistor
for CR oscillation
Ceramic oscillator
Capacitor
32.768 kHz,
CI (Max.)=35 k
5~25pF
See Section 6.6.
1 MHz
100 pF
0.1
F
3.3
F
OSC2
OSC1
VSS
Crystal oscillator
Examples of pattern and oscillator layout
(In case of QFP12-48pin)
Ceramic oscillator
OSC2
OSC1
VSS
[The potential of the substrate
(back of the chip) is VSS.]
4
Note: The above table is simply an example, and is not guaranteed to work.
When using the crystal oscillation circuit and ceramic oscillation circuit, make a board pattern
with noise measure as shown above.
In order to prevent unstable operation of the oscillation circuit due to current leak between OSC1
and VDD, please keep enough distance between VDD and other signals on the board pattern.
Precautions for Visible Radiation
Visible radiation causes semiconductor devices to change the electrical characteristics. It may
cause this IC to malfunction. When developing products which use this IC, consider the following
precautions to prevent malfunctions caused by visible radiations.
(1) Design the product and implement the IC on the board so that it is shielded from visible
radiation in actual use.
(2) The inspection process of the product needs an environment that shields the IC from visible
radiation.
(3) As well as the face of the IC, shield the back and side too.
CHAPTER
5BASIC EXTERNAL WIRING DIAGRAM
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