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參數(shù)資料
| 型號： | S1C6N3B0D0A0100 |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | MICROCONTROLLER, UUC54 |
| 封裝： | DIE-54 |
| 文件頁數(shù)： | 37/79頁 |
| 文件大?。?/td> | 606K |
| 代理商： | S1C6N3B0D0A0100 |
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34
EPSON
S1C6N3B0 TECHNICAL MANUAL
CHAPTER 4: PERIPHERAL CIARCUITS AND OPERATION (LCD Driver)
4.6.4 Mask option
(1) Segment allocation
The segment data is decided by the display data written to the display memory at address "090H–
0AFH".
The addresses and bits of the display memory can be made to correspond to the segment terminals
(SEG0–SEG25/19) in any combination by mask option. This simplifies design by increasing the degree
of freedom with which the liquid crystal panel can be designed.
Figure 4.6.4.1 shows an example of the relationship between the LCD segments (on the panel) and the
display memory in the case of 1/3 duty.
aa'
f
f'
g'
g
ee'
d
d'
p'
p
c'
b'
b
c
SEG10
SEG11
SEG12
Common 0
Common 1
Common 2
09AH
09BH
09CH
09DH
Address
d
p
d'
p'
D3
c
g
c'
g'
D2
b
f
b'
f'
D1
a
e
a'
e'
D0
Data
Display memory allocation
SEG10
SEG11
SEG12
9A, D0
(a)
9A, D1
(b)
9D, D1
(f')
9B, D1
(f)
9B, D2
(g)
9A, D2
(c)
9B, D0
(e)
9A, D3
(d)
9B, D3
(p)
Pin address allocation
Common 0
Common 1
Common 2
Fig. 4.6.4.1 Segment allocation
(2) Drive duty
Either 1/4, 1/3 or 1/2 duty can be selected as the LCD drive duty.
(3) Output specification
The segment terminals (SEG0–SEG25/19) are selected by mask option in pairs for either segment
signal output or DC output (VDD and VSS binary output). When DC output is selected, the data
corresponding to COM0 of each segment terminal is output.
At initial reset, the display memory corresponding to the DC output terminals are set to "1" and the
display memory corresponding to the segment output terminals are undefined.
When DC output is selected, either complementary output or Nch open drain output can be selected
for each terminal by mask option.
Note: The terminal pairs are the combination of SEG (2
n) and SEG (2n + 1) (where n is an integer
from 0 to 12).
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