參數(shù)資料
型號： S1C6N3B0D0A0100
元件分類： 微控制器/微處理器
英文描述： MICROCONTROLLER, UUC54
封裝： DIE-54
文件頁數(shù)： 15/79頁
文件大?。?/td> 606K
代理商： S1C6N3B0D0A0100
14
EPSON
S1C6N3B0 TECHNICAL MANUAL
CHAPTER 4: PERIPHERAL CIARCUITS AND OPERATION (Oscillation Circuit)
As Figure 4.2.4.1 indicates, the CR oscillation circuit can be configured simply by connecting the resistor
RCR between terminals OSC1 and OSC2 since capacity (CCR) is built-in.
See Chapter 6, "Electrical Characteristics" for RCR value.
4.2.5 Ceramic oscillation circuit
The ceramic oscillation circuit can be selected in the S1C6A3B0 by mask option. The oscillation frequency
(fosc) is 400 kHz to 1MHz.
Figure 4.2.5.1 shows the configuration of the ceramic oscillation circuit.
VSS
OSC2
OSC1
Ceramic
CGC
CDC
CPU
and peripheral circuits
R
FC
R
DC
Fig. 4.2.5.1 Configuration of ceramic oscillation circuit
As Figure 4.2.5.1 indicates, the ceramic oscillation circuit can be configured by connecting the ceramic
oscillator (400 kHz–1 MHz) between the OSC1 and OSC2 terminals, the gate capacitor CGC between the
OSC1 and VSS terminals, and the drain capacitor CDC between the OSC2 and VSS terminals.
For both CGC and CDC, connect capacitors that are about 100 pF.
4.2.6 Frequency divider
The CPU operates by inputting the oscillation clock directly.
The operating clocks for the peripheral circuits are generated by the frequency divider at the post stage of
the oscillation circuit.
Oscillation
circuit
fOSC
S1C6N3B0
to CPU
to peripheral
circuit
to peripheral
circuit
to peripheral
circuit
fDVIN
=fOSC
fDVIN/n
Frequency
divider
Oscillation
circuit
(ceramic)
fOSC
S1C6A3B0 (when ceramic oscillation is selected)
to CPU
fDVIN
=fOSC/12
fOSC
fDVIN/n
1/12
fOSC
S1C6A3B0 (when CR oscillation is selected)
to CPU
fDVIN
=fOSC/6
fOSC
fDVIN/n
1/6
Oscillation
circuit
(CR)
Frequency
divider
Frequency
divider
Fig. 4.2.6.1 Configuration of divider
In the S1C6N3B0, the oscillation clock is directly input to the divider for the peripheral circuits.
Since the S1C6A3B0 is a high-speed model, the oscillation clock is divided by 12 (ceramic) or 6 (CR) with
the prescaler and then the divided clock is input to the divider for the peripheral circuits.
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