參數(shù)資料
型號(hào)： S1C6N3B0D0A0100
元件分類： 微控制器/微處理器
英文描述： MICROCONTROLLER, UUC54
封裝： DIE-54
文件頁(yè)數(shù)： 18/79頁(yè)
文件大小： 606K
代理商： S1C6N3B0D0A0100
S1C6N3B0 TECHNICAL MANUAL
EPSON
17
CHAPTER 4: PERIPHERAL CIARCUITS AND OPERATION (Input Ports)
Input interrupt programming related precautions
Factor flag
is set
Not set
Mask register
K port input
Active status
When the content of the mask register is rewritten, while the port K input is in the active status.
The input interrupt factor flag is set at .
Fig. 4.3.2.2 Input interrupt timing
When using an input interrupt, if you rewrite the content of the mask register, when the value of the
input terminal which becomes the interrupt input is in the active status (input terminal = low status), the
factor flag for input interrupt may be set.
For example, a factor flag is set with the timing of shown in Figure 4.3.2.2. However, when clearing the
content of the mask register with the input terminal kept in the low status and then setting it, the factor
flag of the input interrupt is again set at the timing that has been set.
Consequently, when the input terminal is in the active status (low status), do not rewrite the mask
register (clearing, then setting the mask register), so that a factor flag will only set at the falling edge in
this case. When clearing, then setting the mask register, set the mask register, when the input terminal is
not in the active status (high status).
4.3.3 Mask option
The contents that can be selected with the input port mask option are as follows:
(1) Pull-up resistor
An internal pull-up resistor can be selected for each of the four bits of the input ports (K00–K03).
Having selected "pull-up resistor disabled", take care that the input does not float. Select "pull-up
resistor enabled" for input ports that are not being used.
(2) Noise rejection circuit
The input interrupt circuit contains a noise rejection circuit to prevent interrupts form occurring
through noise. The mask option enables selection of the noise rejection circuit for each terminals.
When the noise rejection circuit is used, pulses shorter than 0.5 cycles of the sampling clock are
rejected as noise. To be certain interrupts are generated the input signal must have at least 1.5 cycles of
low width. Be aware that pulses between 0.5 and 1.5 cycles may or may not be regarded as noise
depending on the input timing.
Sampling clock
Input signal
Interrupt
Sampling clock frequency: S1C6N3B0
S1C6A3B0
fOSC/8
fDVIN/8
4 kHz when fOSC = 32 kHz
fDVIN: fOSC/12 (ceramic oscillation) or fOSC/6 (CR oscillation)
Interrupt occurs
Rejected as noise
Fig. 4.3.3.1 Noise rejection
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